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# Intel CAVS SoC family configuration options
#
# Copyright (c) 2020 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
config SOC_FAMILY_INTEL_ADSP
select WINSTREAM
select ARCH_SUPPORTS_COREDUMP
bool
if SOC_FAMILY_INTEL_ADSP
config SOC_FAMILY
string
default "intel_adsp"
# Select SoC Part No. and configuration options
source "soc/xtensa/intel_adsp/*/Kconfig.soc"
DT_COMPAT_INTEL_ADSP_HOST_IPC := intel,adsp-host-ipc
DT_COMPAT_INTEL_ADSP_IDC := intel,adsp-idc
config INTEL_ADSP_IPC
bool "Driver for the host IPC interrupt delivery"
default $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_HOST_IPC)) if !SOF
default $(dt_compat_enabled,$(DT_COMPAT_INTEL_ADSP_IDC)) if !SOF
help
Driver for the host IPC interrupt delivery mechanism.
Currently SOF has its own driver for this hardware.
config ADSP_CLOCK
bool
help
Driver for the CAVS clocks. Allow type of clock (and
thus frequency) to be chosen.
config HP_SRAM_RESERVE
int "Bytes to reserve at start of HP-SRAM"
default 65536
help
Bytes to reserve at the start of HP-SRAM. Zephyr will not
place any symbols here, though the host windows have
addresses here. The SOF application also makes direct use
of this region, so be very careful changing this value.
config ADSP_WIN0_OFFSET
int "Byte offset of host window zero"
default 16384
help
Offset of the first host shared memory window (used for the
"firmware status register" at boot) within the reserved
region at the start of HP-SRAM.
config ADSP_WIN2_OFFSET
int "Byte offset of host window two"
default 32768
help
Offset of the second host shared memory window within
the reserved region at the start of HP-SRAM.
Typically used for debug output, but semantics can vary
depending on the host-firmware communication scheme that
is used.
config ADSP_WIN3_OFFSET
int "Byte offset of host window three"
default 40960
help
Offset of the second host shared memory window within
the reserved region at the start of HP-SRAM.
Typically used for debug output, but semantics can vary
depending on the host-firmware communication scheme that
is used.
config ADSP_TRACE_SIMCALL
bool "Emit SIMCALL output in addition to window tracing"
help
When true, the trace_out layer will also use a SIMCALL
instruction to emit the passed data to the standard output
of an enclosing simulator process. All window contents will
remain identical.
config ADSP_NEED_POWER_ON_CACHE
bool
help
Need to power cache SRAM banks on.
config ADSP_INIT_HPSRAM
bool
default y
help
Need to init HP SRAM.
config ADSP_DISABLE_L2CACHE_AT_BOOT
bool
endif # SOC_FAMILY_INTEL_ADSP