blob: 14f6fad61c568ec818e3b663d5c700dd2c002536 [file] [log] [blame]
description: ST STM32H7 series FDCAN CAN FD controller
compatible: "st,stm32h7-fdcan"
include: ["bosch,m_can-base.yaml", "pinctrl-device.yaml"]
properties:
clocks:
required: true
reg:
required: true
interrupts:
required: true
interrupt-names:
required: true
clk-divider:
type: int
enum:
- 1
- 2
- 4
- 6
- 8
- 10
- 12
- 14
- 16
- 18
- 20
- 22
- 24
- 26
- 28
- 30
description: |
Divides the kernel clock giving the time quanta clock that is fed to the FDCAN core
(FDCAN_CCU->CCFG CDIV register bits). Note that the divisor is common to all
'st,stm32h7-fdcan' instances.
Divide by 1 is the peripherals reset value and remains set unless this property is configured.