boards/arm/v2m_musca/v2m_musca_nonsecure.dts

/*
 * Copyright (c) 2018 Linaro Limited
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;

#include <arm/armv8-m.dtsi>

/ {
	compatible = "arm,v2m-musca";
	#address-cells = <1>;
	#size-cells = <1>;

	chosen {
		zephyr,console = &uart1;
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,shell-uart = &uart1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-m33";
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <1>;

			mpu: mpu@e000ed90 {
				compatible = "arm,armv8m-mpu";
				reg = <0xe000ed90 0x40>;
				arm,num-mpu-regions = <8>;
			};
		};
	};

	flash0: flash@230400 {
		/* QSPI flash */
		reg = <0x00230400 0x1ffc00>;
	};

	sram0: memory@20010000 {
		compatible = "mmio-sram";
		reg = <0x20010000 0x10000>;
	};

	sysclk: system-clock {
		compatible = "fixed-clock";
		clock-frequency = <50000000>;
		#clock-cells = <0>;
	};

	soc {
		peripheral@40000000 {
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x40000000 0x10000000>;

			#include "v2m_musca-common.dtsi"
		};
	};
};

&nvic {
	arm,num-irq-priority-bits = <3>;
};