| /* |
| * Copyright (c) 2019 STMicroelectronics |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| /* SoC level DTS fixup file */ |
| |
| #define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS |
| |
| #define DT_GPIO_STM32_GPIOA_BASE_ADDRESS \ |
| DT_ST_STM32_GPIO_50002000_BASE_ADDRESS |
| #define DT_GPIO_STM32_GPIOA_CLOCK_BITS_0 \ |
| DT_ST_STM32_GPIO_50002000_CLOCK_BITS_0 |
| #define DT_GPIO_STM32_GPIOA_CLOCK_BUS_0 \ |
| DT_ST_STM32_GPIO_50002000_CLOCK_BUS_0 |
| #define DT_GPIO_STM32_GPIOA_CLOCK_CONTROLLER \ |
| DT_ST_STM32_GPIO_50002000_CLOCK_CONTROLLER |
| #define DT_GPIO_STM32_GPIOA_LABEL \ |
| DT_ST_STM32_GPIO_50002000_LABEL |
| #define DT_GPIO_STM32_GPIOA_SIZE \ |
| DT_ST_STM32_GPIO_50002000_SIZE |
| #define DT_GPIO_STM32_GPIOA_CLOCK_BITS \ |
| DT_ST_STM32_GPIO_50002000_CLOCK_BITS |
| #define DT_GPIO_STM32_GPIOA_CLOCK_BUS \ |
| DT_ST_STM32_GPIO_50002000_CLOCK_BUS |
| |
| #define DT_GPIO_STM32_GPIOB_BASE_ADDRESS \ |
| DT_ST_STM32_GPIO_50003000_BASE_ADDRESS |
| #define DT_GPIO_STM32_GPIOB_CLOCK_BITS_0 \ |
| DT_ST_STM32_GPIO_50003000_CLOCK_BITS_0 |
| #define DT_GPIO_STM32_GPIOB_CLOCK_BUS_0 \ |
| DT_ST_STM32_GPIO_50003000_CLOCK_BUS_0 |
| #define DT_GPIO_STM32_GPIOB_CLOCK_CONTROLLER \ |
| DT_ST_STM32_GPIO_50003000_CLOCK_CONTROLLER |
| #define DT_GPIO_STM32_GPIOB_LABEL \ |
| DT_ST_STM32_GPIO_50003000_LABEL |
| #define DT_GPIO_STM32_GPIOB_SIZE \ |
| DT_ST_STM32_GPIO_50003000_SIZE |
| #define DT_GPIO_STM32_GPIOB_CLOCK_BITS \ |
| DT_ST_STM32_GPIO_50003000_CLOCK_BITS |
| #define DT_GPIO_STM32_GPIOB_CLOCK_BUS \ |
| DT_ST_STM32_GPIO_50003000_CLOCK_BUS |
| |
| #define DT_GPIO_STM32_GPIOC_BASE_ADDRESS \ |
| DT_ST_STM32_GPIO_50004000_BASE_ADDRESS |
| #define DT_GPIO_STM32_GPIOC_CLOCK_BITS_0 \ |
| DT_ST_STM32_GPIO_50004000_CLOCK_BITS_0 |
| #define DT_GPIO_STM32_GPIOC_CLOCK_BUS_0 \ |
| DT_ST_STM32_GPIO_50004000_CLOCK_BUS_0 |
| #define DT_GPIO_STM32_GPIOC_CLOCK_CONTROLLER \ |
| DT_ST_STM32_GPIO_50004000_CLOCK_CONTROLLER |
| #define DT_GPIO_STM32_GPIOC_LABEL \ |
| DT_ST_STM32_GPIO_50004000_LABEL |
| #define DT_GPIO_STM32_GPIOC_SIZE \ |
| DT_ST_STM32_GPIO_50004000_SIZE |
| #define DT_GPIO_STM32_GPIOC_CLOCK_BITS \ |
| DT_ST_STM32_GPIO_50004000_CLOCK_BITS |
| #define DT_GPIO_STM32_GPIOC_CLOCK_BUS \ |
| DT_ST_STM32_GPIO_50004000_CLOCK_BUS |
| |
| #define DT_GPIO_STM32_GPIOD_BASE_ADDRESS \ |
| DT_ST_STM32_GPIO_50005000_BASE_ADDRESS |
| #define DT_GPIO_STM32_GPIOD_CLOCK_BITS_0 \ |
| DT_ST_STM32_GPIO_50005000_CLOCK_BITS_0 |
| #define DT_GPIO_STM32_GPIOD_CLOCK_BUS_0 \ |
| T_ST_STM32_GPIO_50005000_CLOCK_BUS_0 |
| #define DT_GPIO_STM32_GPIOD_CLOCK_CONTROLLER \ |
| DT_ST_STM32_GPIO_50005000_CLOCK_CONTROLLER |
| #define DT_GPIO_STM32_GPIOD_LABEL \ |
| DT_ST_STM32_GPIO_50005000_LABEL |
| #define DT_GPIO_STM32_GPIOD_SIZE \ |
| DT_ST_STM32_GPIO_50005000_SIZE |
| #define DT_GPIO_STM32_GPIOD_CLOCK_BITS \ |
| DT_ST_STM32_GPIO_50005000_CLOCK_BITS |
| #define DT_GPIO_STM32_GPIOD_CLOCK_BUS \ |
| DT_ST_STM32_GPIO_50005000_CLOCK_BUS |
| |
| #define DT_GPIO_STM32_GPIOE_BASE_ADDRESS \ |
| DT_ST_STM32_GPIO_50006000_BASE_ADDRESS |
| #define DT_GPIO_STM32_GPIOE_CLOCK_BITS_0 \ |
| DT_ST_STM32_GPIO_50006000_CLOCK_BITS_0 |
| #define DT_GPIO_STM32_GPIOE_CLOCK_BUS_0 \ |
| DT_ST_STM32_GPIO_50006000_CLOCK_BUS_0 |
| #define DT_GPIO_STM32_GPIOE_CLOCK_CONTROLLER \ |
| DT_ST_STM32_GPIO_50006000_CLOCK_CONTROLLER |
| #define DT_GPIO_STM32_GPIOE_LABEL \ |
| DT_ST_STM32_GPIO_50006000_LABEL |
| #define DT_GPIO_STM32_GPIOE_SIZE \ |
| DT_ST_STM32_GPIO_50006000_SIZE |
| #define DT_GPIO_STM32_GPIOE_CLOCK_BITS \ |
| DT_ST_STM32_GPIO_50006000_CLOCK_BITS |
| #define DT_GPIO_STM32_GPIOE_CLOCK_BUS \ |
| DT_ST_STM32_GPIO_50006000_CLOCK_BUS |
| |
| #define DT_GPIO_STM32_GPIOF_BASE_ADDRESS \ |
| DT_ST_STM32_GPIO_50007000_BASE_ADDRESS |
| #define DT_GPIO_STM32_GPIOF_CLOCK_BITS_0 \ |
| DT_ST_STM32_GPIO_50007000_CLOCK_BITS_0 |
| #define DT_GPIO_STM32_GPIOF_CLOCK_BUS_0 \ |
| DT_ST_STM32_GPIO_50007000_CLOCK_BUS_0 |
| #define DT_GPIO_STM32_GPIOF_CLOCK_CONTROLLER \ |
| DT_ST_STM32_GPIO_50007000_CLOCK_CONTROLLER |
| #define DT_GPIO_STM32_GPIOF_LABEL \ |
| DT_ST_STM32_GPIO_50007000_LABEL |
| #define DT_GPIO_STM32_GPIOF_SIZE \ |
| DT_ST_STM32_GPIO_50007000_SIZE |
| #define DT_GPIO_STM32_GPIOF_CLOCK_BITS \ |
| DT_ST_STM32_GPIO_50007000_CLOCK_BITS |
| #define DT_GPIO_STM32_GPIOF_CLOCK_BUS \ |
| DT_ST_STM32_GPIO_50007000_CLOCK_BUS |
| |
| #define DT_GPIO_STM32_GPIOG_BASE_ADDRESS \ |
| DT_ST_STM32_GPIO_50008000_BASE_ADDRESS |
| #define DT_GPIO_STM32_GPIOG_CLOCK_BITS_0 \ |
| DT_ST_STM32_GPIO_50008000_CLOCK_BITS_0 |
| #define DT_GPIO_STM32_GPIOG_CLOCK_BUS_0 \ |
| DT_ST_STM32_GPIO_50008000_CLOCK_BUS_0 |
| #define DT_GPIO_STM32_GPIOG_CLOCK_CONTROLLER \ |
| DT_ST_STM32_GPIO_50008000_CLOCK_CONTROLLER |
| #define DT_GPIO_STM32_GPIOG_LABEL \ |
| DT_ST_STM32_GPIO_50008000_LABEL |
| #define DT_GPIO_STM32_GPIOG_SIZE \ |
| DT_ST_STM32_GPIO_50008000_SIZE |
| #define DT_GPIO_STM32_GPIOG_CLOCK_BITS \ |
| DT_ST_STM32_GPIO_50008000_CLOCK_BITS |
| #define DT_GPIO_STM32_GPIOG_CLOCK_BUS \ |
| DT_ST_STM32_GPIO_50008000_CLOCK_BUS |
| |
| #define DT_GPIO_STM32_GPIOH_BASE_ADDRESS \ |
| DT_ST_STM32_GPIO_50009000_BASE_ADDRESS |
| #define DT_GPIO_STM32_GPIOH_CLOCK_BITS_0 \ |
| DT_ST_STM32_GPIO_50009000_CLOCK_BITS_0 |
| #define DT_GPIO_STM32_GPIOH_CLOCK_BUS_0 \ |
| DT_ST_STM32_GPIO_50009000_CLOCK_BUS_0 |
| #define DT_GPIO_STM32_GPIOH_CLOCK_CONTROLLER \ |
| DT_ST_STM32_GPIO_50009000_CLOCK_CONTROLLER |
| #define DT_GPIO_STM32_GPIOH_LABEL \ |
| DT_ST_STM32_GPIO_50009000_LABEL |
| #define DT_GPIO_STM32_GPIOH_SIZE \ |
| DT_ST_STM32_GPIO_50009000_SIZE |
| #define DT_GPIO_STM32_GPIOH_CLOCK_BITS \ |
| DT_ST_STM32_GPIO_50009000_CLOCK_BITS |
| #define DT_GPIO_STM32_GPIOH_CLOCK_BUS \ |
| DT_ST_STM32_GPIO_50009000_CLOCK_BUS |
| |
| #define DT_GPIO_STM32_GPIOI_BASE_ADDRESS \ |
| DT_ST_STM32_GPIO_5000A000_BASE_ADDRESS |
| #define DT_GPIO_STM32_GPIOI_CLOCK_BITS_0 \ |
| DT_ST_STM32_GPIO_5000A000_CLOCK_BITS_0 |
| #define DT_GPIO_STM32_GPIOI_CLOCK_BUS_0 \ |
| DT_ST_STM32_GPIO_5000A000_CLOCK_BUS_0 |
| #define DT_GPIO_STM32_GPIOI_CLOCK_CONTROLLER \ |
| DT_ST_STM32_GPIO_5000A000_CLOCK_CONTROLLER |
| #define DT_GPIO_STM32_GPIOI_LABEL \ |
| DT_ST_STM32_GPIO_5000A000_LABEL |
| #define DT_GPIO_STM32_GPIOI_SIZE \ |
| DT_ST_STM32_GPIO_5000A000_SIZE |
| #define DT_GPIO_STM32_GPIOI_CLOCK_BITS \ |
| DT_ST_STM32_GPIO_5000A000_CLOCK_BITS |
| #define DT_GPIO_STM32_GPIOI_CLOCK_BUS \ |
| DT_ST_STM32_GPIO_5000A000_CLOCK_BUS |
| |
| #define DT_GPIO_STM32_GPIOJ_BASE_ADDRESS \ |
| DT_ST_STM32_GPIO_5000B000_BASE_ADDRESS |
| #define DT_GPIO_STM32_GPIOJ_CLOCK_BITS_0 \ |
| DT_ST_STM32_GPIO_5000B000_CLOCK_BITS_0 |
| #define DT_GPIO_STM32_GPIOJ_CLOCK_BUS_0 \ |
| DT_ST_STM32_GPIO_5000B000_CLOCK_BUS_0 |
| #define DT_GPIO_STM32_GPIOJ_CLOCK_CONTROLLER \ |
| DT_ST_STM32_GPIO_5000B000_CLOCK_CONTROLLER |
| #define DT_GPIO_STM32_GPIOJ_LABEL \ |
| DT_ST_STM32_GPIO_5000B000_LABEL |
| #define DT_GPIO_STM32_GPIOJ_SIZE \ |
| DT_ST_STM32_GPIO_5000B000_SIZE |
| #define DT_GPIO_STM32_GPIOJ_CLOCK_BITS \ |
| DT_ST_STM32_GPIO_5000B000_CLOCK_BITS |
| #define DT_GPIO_STM32_GPIOJ_CLOCK_BUS \ |
| DT_ST_STM32_GPIO_5000B000_CLOCK_BUS |
| |
| #define DT_GPIO_STM32_GPIOK_BASE_ADDRESS \ |
| DT_ST_STM32_GPIO_5000C000_BASE_ADDRESS |
| #define DT_GPIO_STM32_GPIOK_CLOCK_BITS_0 \ |
| DT_ST_STM32_GPIO_5000C000_CLOCK_BITS_0 |
| #define DT_GPIO_STM32_GPIOK_CLOCK_BUS_0 \ |
| DT_ST_STM32_GPIO_5000C000_CLOCK_BUS_0 |
| #define DT_GPIO_STM32_GPIOK_CLOCK_CONTROLLER \ |
| DT_ST_STM32_GPIO_5000C000_CLOCK_CONTROLLER |
| #define DT_GPIO_STM32_GPIOK_LABEL \ |
| DT_ST_STM32_GPIO_5000C000_LABEL |
| #define DT_GPIO_STM32_GPIOK_SIZE \ |
| DT_ST_STM32_GPIO_5000C000_SIZE |
| #define DT_GPIO_STM32_GPIOK_CLOCK_BITS \ |
| DT_ST_STM32_GPIO_5000C000_CLOCK_BITS |
| #define DT_GPIO_STM32_GPIOK_CLOCK_BUS \ |
| DT_ST_STM32_GPIO_5000C000_CLOCK_BUS |
| |
| #define DT_SPI_1_BASE_ADDRESS \ |
| DT_ST_STM32_SPI_FIFO_44004000_BASE_ADDRESS |
| #define DT_SPI_1_IRQ_PRI \ |
| DT_ST_STM32_SPI_FIFO_44004000_IRQ_0_PRIORITY |
| #define DT_SPI_1_NAME \ |
| DT_ST_STM32_SPI_FIFO_44004000_LABEL |
| #define DT_SPI_1_IRQ \ |
| DT_ST_STM32_SPI_FIFO_44004000_IRQ_0 |
| #define DT_SPI_1_CLOCK_BITS \ |
| DT_ST_STM32_SPI_FIFO_44004000_CLOCK_BITS |
| #define DT_SPI_1_CLOCK_BUS \ |
| DT_ST_STM32_SPI_FIFO_44004000_CLOCK_BUS |
| |
| #define DT_SPI_2_BASE_ADDRESS \ |
| DT_ST_STM32_SPI_FIFO_4400B000_BASE_ADDRESS |
| #define DT_SPI_2_IRQ_PRI \ |
| DT_ST_STM32_SPI_FIFO_4400B000_IRQ_0_PRIORITY |
| #define DT_SPI_2_NAME \ |
| DT_ST_STM32_SPI_FIFO_4400B000_LABEL |
| #define DT_SPI_2_IRQ \ |
| DT_ST_STM32_SPI_FIFO_4400B000_IRQ_0 |
| #define DT_SPI_2_CLOCK_BITS \ |
| DT_ST_STM32_SPI_FIFO_4400B000_CLOCK_BITS |
| #define DT_SPI_2_CLOCK_BUS \ |
| DT_ST_STM32_SPI_FIFO_4400B000_CLOCK_BUS |
| |
| #define DT_SPI_3_BASE_ADDRESS \ |
| DT_ST_STM32_SPI_FIFO_4400C000_BASE_ADDRESS |
| #define DT_SPI_3_IRQ_PRI \ |
| DT_ST_STM32_SPI_FIFO_4400C000_IRQ_0_PRIORITY |
| #define DT_SPI_3_NAME \ |
| DT_ST_STM32_SPI_FIFO_4400C000_LABEL |
| #define DT_SPI_3_IRQ \ |
| DT_ST_STM32_SPI_FIFO_4400C000_IRQ_0 |
| #define DT_SPI_3_CLOCK_BITS \ |
| DT_ST_STM32_SPI_FIFO_4400C000_CLOCK_BITS |
| #define DT_SPI_3_CLOCK_BUS \ |
| DT_ST_STM32_SPI_FIFO_4400C000_CLOCK_BUS |
| |
| #define DT_SPI_4_BASE_ADDRESS \ |
| DT_ST_STM32_SPI_FIFO_44005000_BASE_ADDRESS |
| #define DT_SPI_4_IRQ_PRI \ |
| DT_ST_STM32_SPI_FIFO_44005000_IRQ_0_PRIORITY |
| #define DT_SPI_4_NAME \ |
| DT_ST_STM32_SPI_FIFO_44005000_LABEL |
| #define DT_SPI_4_IRQ \ |
| DT_ST_STM32_SPI_FIFO_44005000_IRQ_0 |
| #define DT_SPI_4_CLOCK_BITS \ |
| DT_ST_STM32_SPI_FIFO_44005000_CLOCK_BITS |
| #define DT_SPI_4_CLOCK_BUS \ |
| DT_ST_STM32_SPI_FIFO_44005000_CLOCK_BUS |
| |
| #define DT_SPI_5_BASE_ADDRESS \ |
| DT_ST_STM32_SPI_FIFO_44009000_BASE_ADDRESS |
| #define DT_SPI_5_IRQ_PRI \ |
| DT_ST_STM32_SPI_FIFO_44009000_IRQ_0_PRIORITY |
| #define DT_SPI_5_NAME \ |
| DT_ST_STM32_SPI_FIFO_44009000_LABEL |
| #define DT_SPI_5_IRQ \ |
| DT_ST_STM32_SPI_FIFO_44009000_IRQ_0 |
| #define DT_SPI_5_CLOCK_BITS \ |
| DT_ST_STM32_SPI_FIFO_44009000_CLOCK_BITS |
| #define DT_SPI_5_CLOCK_BUS \ |
| DT_ST_STM32_SPI_FIFO_40009000_CLOCK_BUS |
| |
| #define DT_UART_STM32_USART_2_BASE_ADDRESS \ |
| DT_ST_STM32_USART_4000E000_BASE_ADDRESS |
| #define DT_UART_STM32_USART_2_BAUD_RATE \ |
| DT_ST_STM32_USART_4000E000_CURRENT_SPEED |
| #define DT_UART_STM32_USART_2_IRQ_PRI \ |
| DT_ST_STM32_USART_4000E000_IRQ_0_PRIORITY |
| #define DT_UART_STM32_USART_2_NAME \ |
| DT_ST_STM32_USART_4000E000_LABEL |
| #define DT_USART_2_IRQ \ |
| DT_ST_STM32_USART_4000E000_IRQ_0 |
| #define DT_UART_STM32_USART_2_CLOCK_BITS \ |
| DT_ST_STM32_USART_4000E000_CLOCK_BITS |
| #define DT_UART_STM32_USART_2_CLOCK_BUS \ |
| DT_ST_STM32_USART_4000E000_CLOCK_BUS |
| #define DT_UART_STM32_USART_2_HW_FLOW_CONTROL \ |
| DT_ST_STM32_USART_4000E000_HW_FLOW_CONTROL |
| |
| #define DT_UART_STM32_USART_3_BASE_ADDRESS \ |
| DT_ST_STM32_USART_4000F000_BASE_ADDRESS |
| #define DT_UART_STM32_USART_3_BAUD_RATE \ |
| DT_ST_STM32_USART_4000F000_CURRENT_SPEED |
| #define DT_UART_STM32_USART_3_IRQ_PRI \ |
| DT_ST_STM32_USART_4000F000_IRQ_0_PRIORITY |
| #define DT_UART_STM32_USART_3_NAME \ |
| DT_ST_STM32_USART_4000F000_LABEL |
| #define DT_USART_3_IRQ \ |
| DT_ST_STM32_USART_4000F000_IRQ_0 |
| #define DT_UART_STM32_USART_3_CLOCK_BITS \ |
| DT_ST_STM32_USART_4000F000_CLOCK_BITS |
| #define DT_UART_STM32_USART_3_CLOCK_BUS \ |
| DT_ST_STM32_USART_4000F000_CLOCK_BUS |
| #define DT_UART_STM32_USART_3_HW_FLOW_CONTROL \ |
| DT_ST_STM32_USART_4000F000_HW_FLOW_CONTROL |
| |
| #define DT_UART_STM32_UART_4_BASE_ADDRESS \ |
| DT_ST_STM32_UART_40010000_BASE_ADDRESS |
| #define DT_UART_STM32_UART_4_BAUD_RATE \ |
| DT_ST_STM32_UART_40010000_CURRENT_SPEED |
| #define DT_UART_STM32_UART_4_IRQ_PRI \ |
| DT_ST_STM32_UART_40010000_IRQ_0_PRIORITY |
| #define DT_UART_STM32_UART_4_NAME \ |
| DT_ST_STM32_UART_40010000_LABEL |
| #define DT_UART_4_IRQ \ |
| DT_ST_STM32_UART_40010000_IRQ_0 |
| #define DT_UART_STM32_UART_4_CLOCK_BITS \ |
| DT_ST_STM32_UART_40010000_CLOCK_BITS |
| #define DT_UART_STM32_UART_4_CLOCK_BUS \ |
| DT_ST_STM32_UART_40010000_CLOCK_BUS |
| #define DT_UART_STM32_UART_4_HW_FLOW_CONTROL \ |
| DT_ST_STM32_UART_40010000_HW_FLOW_CONTROL |
| |
| #define DT_UART_STM32_UART_5_BASE_ADDRESS \ |
| DT_ST_STM32_UART_40011000_BASE_ADDRESS |
| #define DT_UART_STM32_UART_5_BAUD_RATE \ |
| DT_ST_STM32_UART_40011000_CURRENT_SPEED |
| #define DT_UART_STM32_UART_5_IRQ_PRI \ |
| DT_ST_STM32_UART_40011000_IRQ_0_PRIORITY |
| #define DT_UART_STM32_UART_5_NAME \ |
| DT_ST_STM32_UART_40011000_LABEL |
| #define DT_UART_5_IRQ \ |
| DT_ST_STM32_UART_40011000_IRQ_0 |
| #define DT_UART_STM32_UART_5_CLOCK_BITS \ |
| DT_ST_STM32_UART_40011000_CLOCK_BITS |
| #define DT_UART_STM32_UART_5_CLOCK_BUS \ |
| DT_ST_STM32_UART_40011000_CLOCK_BUS |
| #define DT_UART_STM32_UART_5_HW_FLOW_CONTROL \ |
| DT_ST_STM32_UART_40011000_HW_FLOW_CONTROL |
| |
| #define DT_UART_STM32_USART_6_BASE_ADDRESS \ |
| DT_ST_STM32_USART_44003000_BASE_ADDRESS |
| #define DT_UART_STM32_USART_6_BAUD_RATE \ |
| DT_ST_STM32_USART_44003000_CURRENT_SPEED |
| #define DT_UART_STM32_USART_6_IRQ_PRI \ |
| DT_ST_STM32_USART_44003000_IRQ_0_PRIORITY |
| #define DT_UART_STM32_USART_6_NAME \ |
| DT_ST_STM32_USART_44003000_LABEL |
| #define DT_USART_6_IRQ \ |
| DT_ST_STM32_USART_44003000_IRQ_0 |
| #define DT_UART_STM32_USART_6_CLOCK_BITS \ |
| DT_ST_STM32_USART_44003000_CLOCK_BITS |
| #define DT_UART_STM32_USART_6_CLOCK_BUS \ |
| DT_ST_STM32_USART_44003000_CLOCK_BUS |
| #define DT_UART_STM32_USART_6_HW_FLOW_CONTROL \ |
| DT_ST_STM32_USART_40003000_HW_FLOW_CONTROL |
| |
| #define DT_UART_STM32_UART_7_BASE_ADDRESS \ |
| DT_ST_STM32_UART_40018000_BASE_ADDRESS |
| #define DT_UART_STM32_UART_7_BAUD_RATE \ |
| DT_ST_STM32_UART_40018000_CURRENT_SPEED |
| #define DT_UART_STM32_UART_7_IRQ_PRI \ |
| DT_ST_STM32_UART_40018000_IRQ_0_PRIORITY |
| #define DT_UART_STM32_UART_7_NAME \ |
| DT_ST_STM32_UART_40018000_LABEL |
| #define DT_UART_7_IRQ \ |
| DT_ST_STM32_UART_40018000_IRQ_0 |
| #define DT_UART_STM32_UART_7_CLOCK_BITS \ |
| DT_ST_STM32_UART_40018000_CLOCK_BITS |
| #define DT_UART_STM32_UART_7_CLOCK_BUS \ |
| DT_ST_STM32_UART_40018000_CLOCK_BUS |
| #define DT_UART_STM32_UART_7_HW_FLOW_CONTROL \ |
| DT_ST_STM32_UART_40018000_HW_FLOW_CONTROL |
| |
| #define DT_UART_STM32_UART_8_BASE_ADDRESS \ |
| DT_ST_STM32_UART_40019000_BASE_ADDRESS |
| #define DT_UART_STM32_UART_8_BAUD_RATE \ |
| DT_ST_STM32_UART_40019000_CURRENT_SPEED |
| #define DT_UART_STM32_UART_8_IRQ_PRI \ |
| DT_ST_STM32_UART_40019000_IRQ_0_PRIORITY |
| #define DT_UART_STM32_UART_8_NAME \ |
| DT_ST_STM32_UART_40019000_LABEL |
| #define DT_UART_8_IRQ \ |
| DT_ST_STM32_UART_40019000_IRQ_0 |
| #define DT_UART_STM32_UART_8_CLOCK_BITS \ |
| DT_ST_STM32_UART_40019000_CLOCK_BITS |
| #define DT_UART_STM32_UART_8_CLOCK_BUS \ |
| DT_ST_STM32_UART_40019000_CLOCK_BUS |
| #define DT_UART_STM32_UART_8_HW_FLOW_CONTROL \ |
| DT_ST_STM32_UART_40019000_HW_FLOW_CONTROL |
| |
| #define DT_I2C_5_BASE_ADDRESS DT_ST_STM32_I2C_V2_40015000_BASE_ADDRESS |
| #define DT_I2C_5_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40015000_IRQ_EVENT_PRIORITY |
| #define DT_I2C_5_ERROR_IRQ_PRI DT_ST_STM32_I2C_V2_40015000_IRQ_ERROR_PRIORITY |
| #define CONFIG_I2C_5_NAME DT_ST_STM32_I2C_V2_40015000_LABEL |
| #define DT_I2C_5_EVENT_IRQ DT_ST_STM32_I2C_V2_40015000_IRQ_EVENT |
| #define DT_I2C_5_ERROR_IRQ DT_ST_STM32_I2C_V2_40015000_IRQ_ERROR |
| #define DT_I2C_5_BITRATE DT_ST_STM32_I2C_V2_40015000_CLOCK_FREQUENCY |
| #define DT_I2C_5_CLOCK_BITS DT_ST_STM32_I2C_V2_40015000_CLOCK_BITS |
| #define DT_I2C_5_CLOCK_BUS DT_ST_STM32_I2C_V2_40015000_CLOCK_BUS |
| |
| #define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS |
| #define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL |
| #define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0 |
| #define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY |
| #define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS |
| #define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS |
| |
| /* End of SoC Level DTS fixup file */ |
