| # ST Microelectronics STM32H7 MCU series |
| |
| # Copyright (c) 2019 Linaro Limited |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| config SOC_SERIES_STM32H7X |
| select ARM |
| select CPU_CORTEX_M_HAS_DWT |
| select CPU_HAS_FPU |
| select HAS_STM32CUBE |
| select CPU_HAS_ARM_MPU |
| select HAS_SWO |
| select USE_STM32_HAL_CORTEX |
| select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS |
| select CPU_HAS_FPU_DOUBLE_PRECISION if CPU_CORTEX_M7 |
| select CPU_HAS_ICACHE if CPU_CORTEX_M7 |
| select CPU_HAS_DCACHE if CPU_CORTEX_M7 |
| |
| config SOC_STM32H723XX |
| select CPU_CORTEX_M7 |
| |
| config SOC_STM32H725XX |
| select CPU_CORTEX_M7 |
| |
| config SOC_STM32H730XX |
| select CPU_CORTEX_M7 |
| |
| config SOC_STM32H730XXQ |
| select CPU_CORTEX_M7 |
| |
| config SOC_STM32H735XX |
| select CPU_CORTEX_M7 |
| |
| config SOC_STM32H743XX |
| select CPU_CORTEX_M7 |
| |
| config SOC_STM32H745XX_M7 |
| select CPU_CORTEX_M7 |
| |
| config SOC_STM32H745XX_M4 |
| select CPU_CORTEX_M4 |
| |
| config SOC_STM32H747XX_M7 |
| select CPU_CORTEX_M7 |
| |
| config SOC_STM32H747XX_M4 |
| select CPU_CORTEX_M4 |
| |
| config SOC_STM32H750XX |
| select CPU_CORTEX_M7 |
| |
| config SOC_STM32H753XX |
| select CPU_CORTEX_M7 |
| |
| config SOC_STM32H7A3XX |
| select CPU_CORTEX_M7 |
| |
| config SOC_STM32H7A3XXQ |
| select CPU_CORTEX_M7 |
| |
| config SOC_STM32H7B0XX |
| select CPU_CORTEX_M7 |
| |
| config SOC_STM32H7B0XXQ |
| select CPU_CORTEX_M7 |
| |
| config SOC_STM32H7B3XX |
| select CPU_CORTEX_M7 |
| |
| config SOC_STM32H7B3XXQ |
| select CPU_CORTEX_M7 |
| |
| if SOC_SERIES_STM32H7X |
| |
| config STM32H7_DUAL_CORE |
| bool "Dual Core" |
| |
| config STM32H7_BOOT_M4_AT_INIT |
| bool "Boot M4 core during M7 init independent of option byte BCM4." |
| default y |
| |
| endif # SOC_SERIES_STM32H7X |
