| #include "skeleton.dtsi" |
| |
| #define __SIZE_K(x) (x * 1024) |
| |
| / { |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu@0 { |
| device_type = "cpu"; |
| compatible = "intel,quark"; |
| reg = <0>; |
| }; |
| |
| }; |
| |
| flash0: flash@00180000 { |
| reg = <0x00180000 DT_FLASH_SIZE>; |
| }; |
| |
| sram0: memory@00280000 { |
| device_type = "memory"; |
| compatible = "mmio-sram"; |
| reg = <0x00280000 DT_SRAM_SIZE>; |
| }; |
| |
| |
| soc { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "simple-bus"; |
| ranges; |
| |
| rtc: rtc@b0000400 { |
| compatible = "intel,qmsi-rtc"; |
| reg = <0xb0000400 0x400>; |
| clock-frequency = <32768>; |
| }; |
| |
| uart0: uart@b0002000 { |
| compatible = "intel,qmsi-uart"; |
| reg = <0xb0002000 0x400>; |
| label = "UART_0"; |
| |
| status = "disabled"; |
| }; |
| |
| uart1: uart@b0002400 { |
| compatible = "intel,qmsi-uart"; |
| reg = <0xb0002400 0x400>; |
| label = "UART_1"; |
| |
| status = "disabled"; |
| }; |
| |
| gpio: gpio@b000c000 { |
| compatible = "intel,qmsi-gpio"; |
| reg = <0xb00c00 0x400>; |
| |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| }; |
| }; |