| --- |
| title: ns16550 |
| version: 0.1 |
| |
| description: > |
| This binding gives a base representation of the ns16550 UART |
| |
| inherits: |
| !include uart.yaml |
| |
| properties: |
| compatible: |
| constraint: "ns16550" |
| |
| reg: |
| type: array |
| description: mmio register space |
| generation: define |
| category: required |
| |
| reg-shift: |
| type: int |
| category: optional |
| description: quantity to shift the register offsets by |
| generation: define |
| |
| interrupts: |
| type: array |
| category: required |
| description: required interrupts |
| generation: define |
| |
| pcp: |
| type: int |
| category: optional |
| description: custom clock (PRV_CLOCK_PARAMS, if supported) |
| generation: define |
| |
| dlf: |
| type: int |
| category: optional |
| description: divisor latch fraction (DLF, if supported) |
| generation: define |
| |
| pcie: |
| type: boolean |
| category: optional |
| description: attached via PCI(e) bus |
| generation: define |
| ... |
