boards/arm/mimxrt1024_evk/mimxrt1024_evk.dts

/*
 * Copyright (c) 2020, NXP
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;

#include <nxp/nxp_rt1024.dtsi>
#include "mimxrt1024_evk-pinctrl.dtsi"

/ {
	model = "NXP MIMXRT1024-EVK board";
	compatible = "nxp,mimxrt1024";

	aliases {
		led0 = &green_led;
		sw0 = &user_button;
		watchdog0 = &wdog0;
		magn0 = &fxos8700;
		accel0 = &fxos8700;
		sdhc0 = &usdhc1;
	};

	chosen {
		zephyr,flash-controller = &w25q32jvwj0;
		zephyr,flash = &w25q32jvwj0;
		zephyr,code-partition = &slot0_partition;
		zephyr,sram = &sdram0;
		zephyr,itcm = &itcm;
		zephyr,dtcm = &dtcm;
		zephyr,console = &lpuart1;
		zephyr,shell-uart = &lpuart1;
		zephyr,canbus = &flexcan1;
	};

	sdram0: memory@80000000 {
		/* ISSI IS42S16160J-6TLI */
		device_type = "memory";
		reg = <0x80000000 DT_SIZE_M(32)>;
	};

	leds {
		compatible = "gpio-leds";
		green_led: led-1 {
			gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
			label = "User LD1";
		};
	};

	gpio_keys {
		compatible = "gpio-keys";
		user_button: button-1 {
			label = "User SW4";
			gpios = <&gpio5 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
		};
	};
};

&w25q32jvwj0 {
	status = "okay";
	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		boot_partition: partition@0 {
			label = "mcuboot";
			reg = <0x00000000 DT_SIZE_K(64)>;
		};

		slot0_partition: partition@10000 {
			label = "image-0";
			reg = <0x00010000 DT_SIZE_K(1920)>;
		};

		slot1_partition: partition@1f0000 {
			label = "image-1";
			reg = <0x001F0000 DT_SIZE_K(1920)>;
		};

		storage_partition: partition@3d0000 {
			label = "storage";
			reg = <0x003D0000 DT_SIZE_K(128)>;
		};

		scratch_partition: partition@3f0000 {
			label = "image-scratch";
			reg = <0x003f0000 DT_SIZE_K(64)>;
		};
	};
};

&enet {
	status = "okay";
	pinctrl-0 = <&pinmux_enet>;
	pinctrl-names = "default";
	int-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
	reset-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
	ptp {
		status = "okay";
		pinctrl-0 = <&pinmux_ptp>;
		pinctrl-names = "default";
	};
};

&lpuart1 {
	status = "okay";
	current-speed = <115200>;
	pinctrl-0 = <&pinmux_lpuart1>;
	pinctrl-1 = <&pinmux_lpuart1_sleep>;
	pinctrl-names = "default", "sleep";
};

&lpuart2 {
	pinctrl-0 = <&pinmux_lpuart2>;
	pinctrl-1 = <&pinmux_lpuart2_sleep>;
	pinctrl-names = "default", "sleep";
};

&flexcan1 {
	status = "okay";
	bus-speed = <125000>;
	pinctrl-0 = <&pinmux_flexcan1>;
	pinctrl-names = "default";

	can-transceiver {
		max-bitrate = <5000000>;
	};
};

&wdog0 {
	status = "okay";
};

&lpi2c4 {
	status = "okay";
	pinctrl-0 = <&pinmux_lpi2c4>;
	pinctrl-names = "default";
	scl-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
	sda-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;

	fxos8700: fxos8700@1f {
		compatible = "nxp,fxos8700";
		reg = <0x1f>;
	};
};

&edma0 {
	status = "okay";
};

&lpspi1 {
	status = "okay";
	/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
	dmas = <&edma0 0 13>, <&edma0 1 14>;
	dma-names = "rx", "tx";
	pinctrl-0 = <&pinmux_lpspi1>;
	pinctrl-names = "default";
};

&adc1 {
	status = "okay";
	pinctrl-0 = <&pinmux_adc1>;
	pinctrl-names = "default";
};

/* GPT and Systick are enabled. If power management is enabled, the GPT
 * timer will be used instead of systick, as allows the core clock to
 * be gated.
 */
&gpt_hw_timer {
	status = "okay";
};

&systick {
	status = "okay";
};

zephyr_udc0: &usb1 {
	status = "okay";
};

&usdhc1 {
	status = "okay";
	pinctrl-0 = <&pinmux_usdhc1>;
	pinctrl-1 = <&pinmux_usdhc1_slow>;
	pinctrl-2 = <&pinmux_usdhc1_med>;
	pinctrl-3 = <&pinmux_usdhc1_fast>;
	pinctrl-names = "default", "slow", "med", "fast";
	cd-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
	pwr-gpios = <&gpio3 30 GPIO_ACTIVE_HIGH>;
	no-1-8-v;
	sdmmc {
		compatible = "zephyr,sdmmc-disk";
		status = "okay";
	};
};