snippets/nordic-flpr/soc/nrf54l09_cpuapp.overlay

/*
 * Copyright (c) 2025 Nordic Semiconductor
 * SPDX-License-Identifier: Apache-2.0
 */

/ {
	soc {
		reserved-memory {
			#address-cells = <1>;
			#size-cells = <1>;
			cpuflpr_code_partition: image@ee000 {
				/* FLPR core code partition */
				reg = <0xee000 DT_SIZE_K(48)>;
			};
		};

		cpuflpr_sram_code_data: memory@20023c00 {
			compatible = "mmio-sram";
			reg = <0x20023c00 DT_SIZE_K(48)>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x20023c00 DT_SIZE_K(48)>;
		};
	};
};

&uart30 {
	status = "reserved";
};

&cpuflpr_vpr {
	execution-memory = <&cpuflpr_sram_code_data>;
	source-memory = <&cpuflpr_code_partition>;
};

&cpuapp_vevif_tx {
	status = "okay";
};