dts/riscv/wch/qingke-v4c.dtsi

/*
 * Copyright (c) 2025 MASSDRIVER EI (massdriver.space)
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "wch,qingke-v4c";
			reg = <0>;
			riscv,isa = "rv32imac_zicsr_zifencei";
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		ranges;

		pfic: interrupt-controller@e000e000 {
			compatible = "wch,pfic";
			#address-cells = <0>;
			#interrupt-cells = <1>;
			interrupt-controller;
			reg = <0xe000e000 0x10>;
			status = "okay";
		};

		systick: systimer@e000f000 {
			compatible = "wch,systick";
			reg = <0xe000f000 0x10>;
			status = "okay";
			interrupt-parent = <&pfic>;
			interrupts = <12>;
		};
	};
};