| # |
| # Copyright (c) 2014 Wind River Systems, Inc. |
| # Copyright (c) 2018 Synopsys, Inc. All rights reserved. |
| # |
| # SPDX-License-Identifier: Apache-2.0 |
| # |
| |
| if SOC_EMSK_EM7D |
| |
| config CPU_EM4_DMIPS |
| def_bool y |
| |
| config NUM_IRQ_PRIO_LEVELS |
| # This processor supports 4 priority levels: |
| # 0 for Fast Interrupts (FIRQs) and 1-3 for Regular Interrupts (IRQs). |
| default 4 |
| |
| config NUM_IRQS |
| # must be > the highest interrupt number used |
| default 38 if BOARD_EM_STARTERKIT_R23 |
| default 36 if BOARD_EM_STARTERKIT_R22 |
| |
| config ARC_MPU_VER |
| default 3 if BOARD_EM_STARTERKIT_R23 |
| default 2 if BOARD_EM_STARTERKIT_R22 |
| |
| config RGF_NUM_BANKS |
| default 1 |
| |
| config SYS_CLOCK_HW_CYCLES_PER_SEC |
| default 25000000 if BOARD_EM_STARTERKIT_R23 |
| default 30000000 if BOARD_EM_STARTERKIT_R22 |
| |
| config HARVARD |
| default y |
| |
| config ARC_FIRQ |
| default n if BOARD_EM_STARTERKIT_R23 |
| default y if BOARD_EM_STARTERKIT_R22 |
| |
| config CACHE_FLUSHING |
| default y |
| |
| if (ARC_MPU_VER = 2) |
| |
| config MAIN_STACK_SIZE |
| default 2048 |
| |
| config IDLE_STACK_SIZE |
| default 2048 |
| |
| if ZTEST |
| |
| config ZTEST_STACKSIZE |
| default 2048 |
| |
| endif # ZTEST |
| |
| endif # ARC_MPU_VER |
| |
| endif #SOC_EMSK_EM7D |