| /* |
| * Copyright (c) 2022 ITE Corporation. All Rights Reserved. |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <zephyr/dt-bindings/pinctrl/it8xxx2-pinctrl.h> |
| |
| &pinctrl { |
| /* ADC alternate function */ |
| adc0_ch0_gpi0_default: adc0_ch0_gpi0_default { |
| pinmuxs = <&pinctrli 0 IT8XXX2_ALT_FUNC_1>; |
| }; |
| adc0_ch1_gpi1_default: adc0_ch1_gpi1_default { |
| pinmuxs = <&pinctrli 1 IT8XXX2_ALT_FUNC_1>; |
| }; |
| adc0_ch2_gpi2_default: adc0_ch2_gpi2_default { |
| pinmuxs = <&pinctrli 2 IT8XXX2_ALT_FUNC_1>; |
| }; |
| adc0_ch3_gpi3_default: adc0_ch3_gpi3_default { |
| pinmuxs = <&pinctrli 3 IT8XXX2_ALT_FUNC_1>; |
| }; |
| adc0_ch4_gpi4_default: adc0_ch4_gpi4_default { |
| pinmuxs = <&pinctrli 4 IT8XXX2_ALT_FUNC_1>; |
| }; |
| adc0_ch5_gpi5_default: adc0_ch5_gpi5_default { |
| pinmuxs = <&pinctrli 5 IT8XXX2_ALT_FUNC_1>; |
| }; |
| adc0_ch6_gpi6_default: adc0_ch6_gpi6_default { |
| pinmuxs = <&pinctrli 6 IT8XXX2_ALT_FUNC_1>; |
| }; |
| adc0_ch7_gpi7_default: adc0_ch7_gpi7_default { |
| pinmuxs = <&pinctrli 7 IT8XXX2_ALT_FUNC_1>; |
| }; |
| adc0_ch13_gpl0_default: adc0_ch13_gpl0_default { |
| pinmuxs = <&pinctrll 0 IT8XXX2_ALT_FUNC_1>; |
| }; |
| adc0_ch14_gpl1_default: adc0_ch14_gpl1_default { |
| pinmuxs = <&pinctrll 1 IT8XXX2_ALT_FUNC_1>; |
| }; |
| adc0_ch15_gpl2_default: adc0_ch15_gpl2_default { |
| pinmuxs = <&pinctrll 2 IT8XXX2_ALT_FUNC_1>; |
| }; |
| adc0_ch16_gpl3_default: adc0_ch16_gpl3_default { |
| pinmuxs = <&pinctrll 3 IT8XXX2_ALT_FUNC_1>; |
| }; |
| |
| /* I2C alternate function */ |
| i2c0_clk_gpb3_default: i2c0_clk_gpb3_default { |
| pinmuxs = <&pinctrlb 3 IT8XXX2_ALT_FUNC_1>; |
| }; |
| i2c0_data_gpb4_default: i2c0_data_gpb4_default { |
| pinmuxs = <&pinctrlb 4 IT8XXX2_ALT_FUNC_1>; |
| }; |
| i2c1_clk_gpc1_default: i2c1_clk_gpc1_default { |
| pinmuxs = <&pinctrlc 1 IT8XXX2_ALT_FUNC_1>; |
| }; |
| i2c1_data_gpc2_default: i2c1_data_gpc2_default { |
| pinmuxs = <&pinctrlc 2 IT8XXX2_ALT_FUNC_1>; |
| }; |
| i2c2_clk_gpf6_default: i2c2_clk_gpf6_default { |
| pinmuxs = <&pinctrlf 6 IT8XXX2_ALT_FUNC_1>; |
| }; |
| i2c2_data_gpf7_default: i2c2_data_gpf7_default { |
| pinmuxs = <&pinctrlf 7 IT8XXX2_ALT_FUNC_1>; |
| }; |
| i2c3_clk_gph1_default: i2c3_clk_gph1_default { |
| pinmuxs = <&pinctrlh 1 IT8XXX2_ALT_FUNC_3>; |
| }; |
| i2c3_data_gph2_default: i2c3_data_gph2_default { |
| pinmuxs = <&pinctrlh 2 IT8XXX2_ALT_FUNC_3>; |
| }; |
| i2c3_clk_gpf2_default: i2c3_clk_gpf2_default { |
| pinmuxs = <&pinctrlf 2 IT8XXX2_ALT_FUNC_4>; |
| }; |
| i2c3_data_gpf3_default: i2c3_data_gpf3_default { |
| pinmuxs = <&pinctrlf 3 IT8XXX2_ALT_FUNC_4>; |
| }; |
| i2c4_clk_gpe0_default: i2c4_clk_gpe0_default { |
| pinmuxs = <&pinctrle 0 IT8XXX2_ALT_FUNC_3>; |
| }; |
| i2c4_data_gpe7_default: i2c4_data_gpe7_default { |
| pinmuxs = <&pinctrle 7 IT8XXX2_ALT_FUNC_3>; |
| }; |
| i2c5_clk_gpa4_default: i2c5_clk_gpa4_default { |
| pinmuxs = <&pinctrla 4 IT8XXX2_ALT_FUNC_3>; |
| }; |
| i2c5_data_gpa5_default: i2c5_data_gpa5_default { |
| pinmuxs = <&pinctrla 5 IT8XXX2_ALT_FUNC_3>; |
| }; |
| |
| /* I2C alternate function (Mapping pins for IT82XX2) */ |
| i2c2_clk_gpc7_default: i2c2_clk_gpc7_default { |
| pinmuxs = <&pinctrlc 7 IT8XXX2_ALT_FUNC_4>; |
| }; |
| i2c2_data_gpd0_default: i2c2_data_gpd0_default { |
| pinmuxs = <&pinctrld 0 IT8XXX2_ALT_FUNC_4>; |
| }; |
| i2c3_clk_gpb2_default: i2c3_clk_gpb2_default { |
| pinmuxs = <&pinctrlb 2 IT8XXX2_ALT_FUNC_3>; |
| }; |
| i2c3_data_gpb5_default: i2c3_data_gpb5_default { |
| pinmuxs = <&pinctrlb 5 IT8XXX2_ALT_FUNC_3>; |
| }; |
| i2c5_clk_gpe1_default: i2c5_clk_gpe1_default { |
| pinmuxs = <&pinctrle 1 IT8XXX2_ALT_FUNC_3>; |
| }; |
| i2c5_data_gpe2_default: i2c5_data_gpe2_default { |
| pinmuxs = <&pinctrle 2 IT8XXX2_ALT_FUNC_3>; |
| }; |
| |
| /* Keyboard alternate function */ |
| ksi0_default: ksi0_default { |
| pinmuxs = <&pinctrlksi 0 IT8XXX2_ALT_FUNC_1>; |
| bias-pull-up; |
| }; |
| ksi1_default: ksi1_default { |
| pinmuxs = <&pinctrlksi 1 IT8XXX2_ALT_FUNC_1>; |
| bias-pull-up; |
| }; |
| ksi2_default: ksi2_default { |
| pinmuxs = <&pinctrlksi 2 IT8XXX2_ALT_FUNC_1>; |
| bias-pull-up; |
| }; |
| ksi3_default: ksi3_default { |
| pinmuxs = <&pinctrlksi 3 IT8XXX2_ALT_FUNC_1>; |
| bias-pull-up; |
| }; |
| ksi4_default: ksi4_default { |
| pinmuxs = <&pinctrlksi 4 IT8XXX2_ALT_FUNC_1>; |
| bias-pull-up; |
| }; |
| ksi5_default: ksi5_default { |
| pinmuxs = <&pinctrlksi 5 IT8XXX2_ALT_FUNC_1>; |
| bias-pull-up; |
| }; |
| ksi6_default: ksi6_default { |
| pinmuxs = <&pinctrlksi 6 IT8XXX2_ALT_FUNC_1>; |
| bias-pull-up; |
| }; |
| ksi7_default: ksi7_default { |
| pinmuxs = <&pinctrlksi 7 IT8XXX2_ALT_FUNC_1>; |
| bias-pull-up; |
| }; |
| kso0_default: kso0_default { |
| pinmuxs = <&pinctrlksol 0 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso1_default: kso1_default { |
| pinmuxs = <&pinctrlksol 1 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso2_default: kso2_default { |
| pinmuxs = <&pinctrlksol 2 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso3_default: kso3_default { |
| pinmuxs = <&pinctrlksol 3 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso4_default: kso4_default { |
| pinmuxs = <&pinctrlksol 4 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso5_default: kso5_default { |
| pinmuxs = <&pinctrlksol 5 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso6_default: kso6_default { |
| pinmuxs = <&pinctrlksol 6 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso7_default: kso7_default { |
| pinmuxs = <&pinctrlksol 7 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso8_default: kso8_default { |
| pinmuxs = <&pinctrlksoh 0 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso9_default: kso9_default { |
| pinmuxs = <&pinctrlksoh 1 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso10_default: kso10_default { |
| pinmuxs = <&pinctrlksoh 2 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso11_default: kso11_default { |
| pinmuxs = <&pinctrlksoh 3 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso12_default: kso12_default { |
| pinmuxs = <&pinctrlksoh 4 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso13_default: kso13_default { |
| pinmuxs = <&pinctrlksoh 5 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso14_default: kso14_default { |
| pinmuxs = <&pinctrlksoh 6 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso15_default: kso15_default { |
| pinmuxs = <&pinctrlksoh 7 IT8XXX2_ALT_FUNC_1>; |
| drive-open-drain; |
| bias-pull-up; |
| }; |
| kso16_gpc3_default: kso16_gpc3_default { |
| pinmuxs = <&pinctrlc 3 IT8XXX2_ALT_FUNC_1>; |
| bias-pull-up; |
| }; |
| kso17_gpc5_default: kso17_gpc5_default { |
| pinmuxs = <&pinctrlc 5 IT8XXX2_ALT_FUNC_1>; |
| bias-pull-up; |
| }; |
| |
| /* Keyboard sleep function */ |
| ksi0_sleep: ksi0_sleep { |
| pinmuxs = <&pinctrlksi 0 IT8XXX2_ALT_DEFAULT>; |
| }; |
| ksi1_sleep: ksi1_sleep { |
| pinmuxs = <&pinctrlksi 1 IT8XXX2_ALT_DEFAULT>; |
| }; |
| ksi2_sleep: ksi2_sleep { |
| pinmuxs = <&pinctrlksi 2 IT8XXX2_ALT_DEFAULT>; |
| }; |
| ksi3_sleep: ksi3_sleep { |
| pinmuxs = <&pinctrlksi 3 IT8XXX2_ALT_DEFAULT>; |
| }; |
| ksi4_sleep: ksi4_sleep { |
| pinmuxs = <&pinctrlksi 4 IT8XXX2_ALT_DEFAULT>; |
| }; |
| ksi5_sleep: ksi5_sleep { |
| pinmuxs = <&pinctrlksi 5 IT8XXX2_ALT_DEFAULT>; |
| }; |
| ksi6_sleep: ksi6_sleep { |
| pinmuxs = <&pinctrlksi 6 IT8XXX2_ALT_DEFAULT>; |
| }; |
| ksi7_sleep: ksi7_sleep { |
| pinmuxs = <&pinctrlksi 7 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso0_sleep: kso0_sleep { |
| pinmuxs = <&pinctrlksol 0 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso1_sleep: kso1_sleep { |
| pinmuxs = <&pinctrlksol 1 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso2_sleep: kso2_sleep { |
| pinmuxs = <&pinctrlksol 2 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso3_sleep: kso3_sleep { |
| pinmuxs = <&pinctrlksol 3 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso4_sleep: kso4_sleep { |
| pinmuxs = <&pinctrlksol 4 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso5_sleep: kso5_sleep { |
| pinmuxs = <&pinctrlksol 5 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso6_sleep: kso6_sleep { |
| pinmuxs = <&pinctrlksol 6 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso7_sleep: kso7_sleep { |
| pinmuxs = <&pinctrlksol 7 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso8_sleep: kso8_sleep { |
| pinmuxs = <&pinctrlksoh 0 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso9_sleep: kso9_sleep { |
| pinmuxs = <&pinctrlksoh 1 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso10_sleep: kso10_sleep { |
| pinmuxs = <&pinctrlksoh 2 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso11_sleep: kso11_sleep { |
| pinmuxs = <&pinctrlksoh 3 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso12_sleep: kso12_sleep { |
| pinmuxs = <&pinctrlksoh 4 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso13_sleep: kso13_sleep { |
| pinmuxs = <&pinctrlksoh 5 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso14_sleep: kso14_sleep { |
| pinmuxs = <&pinctrlksoh 6 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso15_sleep: kso15_sleep { |
| pinmuxs = <&pinctrlksoh 7 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso16_gpc3_sleep: kso16_gpc3_sleep { |
| pinmuxs = <&pinctrlc 3 IT8XXX2_ALT_DEFAULT>; |
| }; |
| kso17_gpc5_sleep: kso17_gpc5_sleep { |
| pinmuxs = <&pinctrlc 5 IT8XXX2_ALT_DEFAULT>; |
| }; |
| |
| /* PECI alternate function */ |
| peci_gpf6_default: peci_gpf6_default { |
| pinmuxs = <&pinctrlf 6 IT8XXX2_ALT_FUNC_3>; |
| }; |
| |
| /* PWM alternate function */ |
| pwm0_gpa0_default: pwm0_gpa0_default { |
| pinmuxs = <&pinctrla 0 IT8XXX2_ALT_FUNC_1>; |
| }; |
| pwm1_gpa1_default: pwm1_gpa1_default { |
| pinmuxs = <&pinctrla 1 IT8XXX2_ALT_FUNC_1>; |
| }; |
| pwm2_gpa2_default: pwm2_gpa2_default { |
| pinmuxs = <&pinctrla 2 IT8XXX2_ALT_FUNC_1>; |
| }; |
| pwm3_gpa3_default: pwm3_gpa3_default { |
| pinmuxs = <&pinctrla 3 IT8XXX2_ALT_FUNC_1>; |
| }; |
| pwm4_gpa4_default: pwm4_gpa4_default { |
| pinmuxs = <&pinctrla 4 IT8XXX2_ALT_FUNC_1>; |
| }; |
| pwm5_gpa5_default: pwm5_gpa5_default { |
| pinmuxs = <&pinctrla 5 IT8XXX2_ALT_FUNC_1>; |
| }; |
| pwm6_gpa6_default: pwm6_gpa6_default { |
| pinmuxs = <&pinctrla 6 IT8XXX2_ALT_FUNC_1>; |
| }; |
| pwm7_gpa7_default: pwm7_gpa7_default { |
| pinmuxs = <&pinctrla 7 IT8XXX2_ALT_FUNC_1>; |
| }; |
| |
| /* SHI alternate function */ |
| shi_mosi_gpm0_default: shi_mosi_gpm0_default { |
| pinmuxs = <&pinctrlm 0 IT8XXX2_ALT_FUNC_1>; |
| }; |
| shi_miso_gpm1_default: shi_miso_gpm1_default { |
| pinmuxs = <&pinctrlm 1 IT8XXX2_ALT_FUNC_1>; |
| }; |
| shi_clk_gpm4_default: shi_clk_gpm4_default { |
| pinmuxs = <&pinctrlm 4 IT8XXX2_ALT_FUNC_1>; |
| }; |
| shi_cs_gpm5_default: shi_cs_gpm5_default { |
| pinmuxs = <&pinctrlm 5 IT8XXX2_ALT_FUNC_1>; |
| }; |
| |
| /* Tachometer alternate function */ |
| tach0a_gpd6_default: tach0a_gpd6_default { |
| pinmuxs = <&pinctrld 6 IT8XXX2_ALT_FUNC_1>; |
| }; |
| tach0b_gpj2_default: tach0b_gpj2_default { |
| pinmuxs = <&pinctrlj 2 IT8XXX2_ALT_FUNC_3>; |
| }; |
| tach1a_gpd7_default: tach1a_gpd7_default { |
| pinmuxs = <&pinctrld 7 IT8XXX2_ALT_FUNC_1>; |
| }; |
| tach1b_gpj3_default: tach1b_gpj3_default { |
| pinmuxs = <&pinctrlj 3 IT8XXX2_ALT_FUNC_3>; |
| }; |
| |
| /* UART alternate function */ |
| uart1_rx_gpb0_default: uart1_rx_gpb0_default { |
| pinmuxs = <&pinctrlb 0 IT8XXX2_ALT_FUNC_3>; |
| }; |
| uart1_tx_gpb1_default: uart1_tx_gpb1_default { |
| pinmuxs = <&pinctrlb 1 IT8XXX2_ALT_FUNC_3>; |
| }; |
| uart2_rx_gph1_default: uart2_rx_gph1_default { |
| pinmuxs = <&pinctrlh 1 IT8XXX2_ALT_FUNC_4>; |
| }; |
| uart2_tx_gph2_default: uart2_tx_gph2_default { |
| pinmuxs = <&pinctrlh 2 IT8XXX2_ALT_FUNC_4>; |
| }; |
| uart2_rx_gph5_default: uart2_rx_gph5_default { |
| pinmuxs = <&pinctrlh 5 IT8XXX2_ALT_FUNC_3>; |
| }; |
| uart2_tx_gph6_default: uart2_tx_gph6_default { |
| pinmuxs = <&pinctrlh 6 IT8XXX2_ALT_FUNC_3>; |
| }; |
| uart2_rx_gpf0_default: uart2_rx_gpf0_default { |
| pinmuxs = <&pinctrlf 0 IT8XXX2_ALT_FUNC_3>; |
| }; |
| uart2_tx_gpf1_default: uart2_tx_gpf1_default { |
| pinmuxs = <&pinctrlf 1 IT8XXX2_ALT_FUNC_3>; |
| }; |
| |
| /* USB alternate function */ |
| usb0_dm_gph5_default: usb0_dm_gph5_default { |
| pinmuxs = <&pinctrlh 5 IT8XXX2_ALT_DEFAULT>; |
| }; |
| usb0_dp_gph6_default: usb0_dp_gph6_default { |
| pinmuxs = <&pinctrlh 6 IT8XXX2_ALT_DEFAULT>; |
| }; |
| |
| /* SPI alternate function */ |
| spi_ssce0_default: spi_ssce0_default { |
| pinmuxs = <&pinctrlg 2 IT8XXX2_ALT_FUNC_3>; |
| }; |
| spi_ssce1_default: spi_ssce1_default { |
| pinmuxs = <&pinctrlg 0 IT8XXX2_ALT_FUNC_3>; |
| }; |
| spi_ssck_default: spi_ssck_default { |
| pinmuxs = <&pinctrla 6 IT8XXX2_ALT_FUNC_3>; |
| }; |
| spi_smosi_default: spi_smosi_default { |
| pinmuxs = <&pinctrlc 3 IT8XXX2_ALT_FUNC_3>; |
| }; |
| spi_smiso_default: spi_smiso_default { |
| pinmuxs = <&pinctrlc 5 IT8XXX2_ALT_FUNC_3>; |
| }; |
| spi_sio2_default: spi_sio2_default { |
| pinmuxs = <&pinctrlc 0 IT8XXX2_ALT_FUNC_1>; |
| }; |
| spi_sio3_default: spi_sio3_default { |
| pinmuxs = <&pinctrlc 6 IT8XXX2_ALT_FUNC_1>; |
| }; |
| |
| }; |
