soc/nxp/rw/Kconfig

# Copyright 2022-2024 NXP
# SPDX-License-Identifier: Apache-2.0

config SOC_SERIES_RW6XX
	select ARM
	select CPU_CORTEX_M33
	select CPU_CORTEX_M_HAS_DWT
	select CLOCK_CONTROL
	select SOC_RESET_HOOK
	select CPU_HAS_ARM_SAU
	select CPU_HAS_ARM_MPU
	select CPU_HAS_FPU
	select HAS_MCUX_OS_TIMER
	select ARM_TRUSTZONE_M
	select CPU_CORTEX_M_HAS_SYSTICK
	select HAS_MCUX
	select HAS_MCUX_FLEXCOMM
	select HAS_MCUX_CACHE
	select HAS_PM
	select HAS_NXP_MONOLITHIC_BT
	select SOC_EARLY_INIT_HOOK

if SOC_SERIES_RW6XX

menuconfig NXP_RW6XX_BOOT_HEADER
	bool "Create boot header"
	default y if !BOOTLOADER_MCUBOOT
	help
	  Create data structures required by the boot ROM to boot the
	  application from an external flash device.

if NXP_RW6XX_BOOT_HEADER

rsource "../common/Kconfig.rom_loader"

config FLASH_CONFIG_OFFSET
	hex "Flash config data offset"
	default 0x400
	help
	  The flash config offset provides the boot ROM with the on-board
	  flash type and parameters. The boot ROM requires a fixed flash conifg
	  offset for FlexSPI device.

config IMAGE_VECTOR_TABLE_OFFSET
	hex "Image vector table offset"
	default 0x1000
	help
	  The Image Vector Table (IVT) provides the boot ROM with pointers to
	  the application entry point and device configuration data. The boot
	  ROM requires a fixed IVT offset for each type of boot device.

endif # NXP_RW6XX_BOOT_HEADER

rsource "../common/Kconfig.flexspi_xip"

endif # SOC_SERIES_RW6XX