blob: 9e63c308a30fc62e97842db044c6e327da3debb6 [file] [log] [blame]
# Kconfig - MIMXRT1050-EVK board
#
# Copyright (c) 2017, NXP
#
# SPDX-License-Identifier: Apache-2.0
#
if BOARD_MIMXRT1050_EVK || BOARD_MIMXRT1050_EVK_QSPI
config BOARD
default "mimxrt1050_evk"
if GPIO_MCUX_IGPIO
config GPIO_MCUX_IGPIO_1
default y
config GPIO_MCUX_IGPIO_2
default n
config GPIO_MCUX_IGPIO_3
default n
config GPIO_MCUX_IGPIO_4
default n
config GPIO_MCUX_IGPIO_5
default y
endif # GPIO_MCUX_IGPIO
if I2C_MCUX_LPI2C
config I2C_1
default y
endif # I2C_MCUX_LPI2C
if SPI_MCUX_LPSPI
config SPI_3
default y
endif # SPI_MCUX_LPSPI
if UART_MCUX_LPUART
config UART_MCUX_LPUART_1
default y
config UART_MCUX_LPUART_3
default y if BT_UART
endif # UART_MCUX_LPUART
if CODE_ITCM
config FLASH_SIZE
default $(dt_int_val,DT_NXP_IMX_ITCM_0_SIZE,K)
config FLASH_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_ITCM_0_BASE_ADDRESS)
endif # CODE_ITCM
if CODE_HYPERFLASH || CODE_QSPI
config FLASH_SIZE
default $(dt_int_val,DT_NXP_IMX_FLEXSPI_402A8000_SIZE_1,K)
config FLASH_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_FLEXSPI_402A8000_BASE_ADDRESS_1)
endif
if DATA_DTCM
config SRAM_SIZE
default $(dt_int_val,DT_NXP_IMX_DTCM_0_SIZE,K)
config SRAM_BASE_ADDRESS
default $(dt_hex_val,DT_NXP_IMX_DTCM_0_BASE_ADDRESS)
endif
if DATA_SDRAM
config SRAM_SIZE
default $(dt_int_val,DT_MMIO_SRAM_80000000_SIZE,K)
config SRAM_BASE_ADDRESS
default $(dt_hex_val,DT_MMIO_SRAM_80000000_BASE_ADDRESS)
endif
if NETWORKING
config NET_L2_ETHERNET
def_bool y
config ETH_MCUX_0
def_bool y if NET_L2_ETHERNET
endif # NETWORKING
endif # BOARD_MIMXRT1050_EVK || BOARD_MIMXRT1050_EVK_QSPI