| # Kconfig - MIMXRT1060-EVK board |
| # |
| # Copyright (c) 2018, NXP |
| # |
| # SPDX-License-Identifier: Apache-2.0 |
| # |
| |
| if BOARD_MIMXRT1060_EVK || BOARD_MIMXRT1060_EVK_HYPERFLASH |
| |
| config BOARD |
| default "mimxrt1060_evk" if BOARD_MIMXRT1060_EVK |
| default "mimxrt1060_evk_hyperflash" if BOARD_MIMXRT1060_EVK_HYPERFLASH |
| |
| if GPIO_MCUX_IGPIO |
| |
| config GPIO_MCUX_IGPIO_1 |
| default y |
| |
| config GPIO_MCUX_IGPIO_5 |
| default y |
| |
| endif # GPIO_MCUX_IGPIO |
| |
| if UART_MCUX_LPUART |
| |
| config UART_MCUX_LPUART_1 |
| default y |
| |
| config UART_MCUX_LPUART_3 |
| default y if BT_UART |
| |
| endif # UART_MCUX_LPUART |
| |
| if CODE_ITCM |
| |
| config FLASH_SIZE |
| default $(dt_int_val,DT_NXP_IMX_ITCM_0_SIZE,K) |
| |
| config FLASH_BASE_ADDRESS |
| default $(dt_hex_val,DT_NXP_IMX_ITCM_0_BASE_ADDRESS) |
| |
| endif # CODE_ITCM |
| |
| if CODE_HYPERFLASH || CODE_QSPI |
| |
| config FLASH_SIZE |
| default $(dt_int_val,DT_NXP_IMX_FLEXSPI_402A8000_SIZE_1,K) |
| |
| config FLASH_BASE_ADDRESS |
| default $(dt_hex_val,DT_NXP_IMX_FLEXSPI_402A8000_BASE_ADDRESS_1) |
| |
| endif |
| |
| if DATA_DTCM |
| |
| config SRAM_SIZE |
| default $(dt_int_val,DT_NXP_IMX_DTCM_0_SIZE,K) |
| |
| config SRAM_BASE_ADDRESS |
| default $(dt_hex_val,DT_NXP_IMX_DTCM_0_BASE_ADDRESS) |
| endif |
| |
| if DATA_SDRAM |
| |
| config SRAM_SIZE |
| default $(dt_int_val,DT_MMIO_SRAM_80000000_SIZE,K) |
| |
| config SRAM_BASE_ADDRESS |
| default $(dt_hex_val,DT_MMIO_SRAM_80000000_BASE_ADDRESS) |
| endif |
| |
| endif # BOARD_MIMXRT1060_EVK || BOARD_MIMXRT1060_EVK_HYPERFLASH |
