dt-bindings/clock: remove STM32_SRC_CLOCK_MIN / MAX definitions
The STM32_SRC_CLOCK_MIN and STM32_SRC_CLOCK_MAX defines
are not really needed because non valid clock sources are already
filtered out by the precompiler.
Only STM32_SRC_CLOCK_MIN was used once in code and can be replaced.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
diff --git a/drivers/clock_control/clock_stm32_ll_common.c b/drivers/clock_control/clock_stm32_ll_common.c
index 1f95121..8caddf0 100644
--- a/drivers/clock_control/clock_stm32_ll_common.c
+++ b/drivers/clock_control/clock_stm32_ll_common.c
@@ -181,7 +181,7 @@
clock_control_subsys_t sub_system,
void *data)
{
-#if defined(STM32_SRC_CLOCK_MIN)
+#if defined(STM32_SRC_SYSCLK)
/* At least one alt src clock available */
struct stm32_pclken *pclken = (struct stm32_pclken *)(sub_system);
volatile uint32_t *reg;
diff --git a/include/zephyr/dt-bindings/clock/stm32f0_clock.h b/include/zephyr/dt-bindings/clock/stm32f0_clock.h
index dd87ab6..5c4563d 100644
--- a/include/zephyr/dt-bindings/clock/stm32f0_clock.h
+++ b/include/zephyr/dt-bindings/clock/stm32f0_clock.h
@@ -27,9 +27,6 @@
/** PLL clock */
#define STM32_SRC_PLLCLK 0x006
-#define STM32_SRC_CLOCK_MIN STM32_SRC_HSI
-#define STM32_SRC_CLOCK_MAX STM32_SRC_PLLCLK
-
/**
* @brief STM32 clock configuration bit field.
*
diff --git a/include/zephyr/dt-bindings/clock/stm32f3_clock.h b/include/zephyr/dt-bindings/clock/stm32f3_clock.h
index 69621d3..a589e6f 100644
--- a/include/zephyr/dt-bindings/clock/stm32f3_clock.h
+++ b/include/zephyr/dt-bindings/clock/stm32f3_clock.h
@@ -28,9 +28,6 @@
/** PLL clock */
#define STM32_SRC_PLLCLK 0x006
-#define STM32_SRC_CLOCK_MIN STM32_SRC_HSI
-#define STM32_SRC_CLOCK_MAX STM32_SRC_PLLCLK
-
/**
* @brief STM32 clock configuration bit field.
*
diff --git a/include/zephyr/dt-bindings/clock/stm32g0_clock.h b/include/zephyr/dt-bindings/clock/stm32g0_clock.h
index ff3e110..563d8a3 100644
--- a/include/zephyr/dt-bindings/clock/stm32g0_clock.h
+++ b/include/zephyr/dt-bindings/clock/stm32g0_clock.h
@@ -30,9 +30,6 @@
/** PLL clock */
#define STM32_SRC_PLLCLK 0x007
-#define STM32_SRC_CLOCK_MIN STM32_SRC_HSI
-#define STM32_SRC_CLOCK_MAX STM32_SRC_PLLCLK
-
/**
* @brief STM32 clock configuration bit field.
*
diff --git a/include/zephyr/dt-bindings/clock/stm32g4_clock.h b/include/zephyr/dt-bindings/clock/stm32g4_clock.h
index 2e05e12..5373ada 100644
--- a/include/zephyr/dt-bindings/clock/stm32g4_clock.h
+++ b/include/zephyr/dt-bindings/clock/stm32g4_clock.h
@@ -34,9 +34,6 @@
#define STM32_SRC_PLLCLK 0x008
/* TODO: PLLSAI clocks */
-#define STM32_SRC_CLOCK_MIN STM32_SRC_HSI
-#define STM32_SRC_CLOCK_MAX STM32_SRC_PLLCLK
-
/**
* @brief STM32 clock configuration bit field.
*
diff --git a/include/zephyr/dt-bindings/clock/stm32h7_clock.h b/include/zephyr/dt-bindings/clock/stm32h7_clock.h
index ec330b5..15413d2 100644
--- a/include/zephyr/dt-bindings/clock/stm32h7_clock.h
+++ b/include/zephyr/dt-bindings/clock/stm32h7_clock.h
@@ -37,9 +37,6 @@
/** Clock muxes */
#define STM32_SRC_CKPER 0x013
-#define STM32_SRC_CLOCK_MIN STM32_SRC_PLL1_P
-#define STM32_SRC_CLOCK_MAX STM32_SRC_CKPER
-
/** Bus clocks */
#define STM32_CLOCK_BUS_AHB3 0x0D4
#define STM32_CLOCK_BUS_AHB1 0x0D8
diff --git a/include/zephyr/dt-bindings/clock/stm32l0_clock.h b/include/zephyr/dt-bindings/clock/stm32l0_clock.h
index 647c3cd..5ce3e24 100644
--- a/include/zephyr/dt-bindings/clock/stm32l0_clock.h
+++ b/include/zephyr/dt-bindings/clock/stm32l0_clock.h
@@ -28,9 +28,6 @@
/** Bus clock */
#define STM32_SRC_PCLK 0x006
-#define STM32_SRC_CLOCK_MIN STM32_SRC_HSE
-#define STM32_SRC_CLOCK_MAX STM32_SRC_PCLK
-
/**
* @brief STM32 clock configuration bit field.
*
diff --git a/include/zephyr/dt-bindings/clock/stm32l1_clock.h b/include/zephyr/dt-bindings/clock/stm32l1_clock.h
index fb4ee16..7b6dcb7 100644
--- a/include/zephyr/dt-bindings/clock/stm32l1_clock.h
+++ b/include/zephyr/dt-bindings/clock/stm32l1_clock.h
@@ -22,9 +22,6 @@
#define STM32_SRC_LSE 0x002
#define STM32_SRC_LSI 0x003
-#define STM32_SRC_CLOCK_MIN STM32_SRC_HSE
-#define STM32_SRC_CLOCK_MAX STM32_SRC_LSI
-
/**
* @brief STM32 clock configuration bit field.
*
diff --git a/include/zephyr/dt-bindings/clock/stm32l4_clock.h b/include/zephyr/dt-bindings/clock/stm32l4_clock.h
index eb572c9..0508463 100644
--- a/include/zephyr/dt-bindings/clock/stm32l4_clock.h
+++ b/include/zephyr/dt-bindings/clock/stm32l4_clock.h
@@ -34,9 +34,6 @@
#define STM32_SRC_PLLCLK 0x008
/* TODO: PLLSAI clocks */
-#define STM32_SRC_CLOCK_MIN STM32_SRC_HSI
-#define STM32_SRC_CLOCK_MAX STM32_SRC_PLLCLK
-
/**
* @brief STM32 clock configuration bit field.
*
diff --git a/include/zephyr/dt-bindings/clock/stm32u5_clock.h b/include/zephyr/dt-bindings/clock/stm32u5_clock.h
index b725a0e..b4b6083 100644
--- a/include/zephyr/dt-bindings/clock/stm32u5_clock.h
+++ b/include/zephyr/dt-bindings/clock/stm32u5_clock.h
@@ -34,9 +34,6 @@
/** Clock muxes */
/* #define STM32_SRC_ICLK 0x012 */
-#define STM32_SRC_CLOCK_MIN STM32_SRC_PLL1_P
-#define STM32_SRC_CLOCK_MAX STM32_SRC_SYSCLK
-
/** Bus clocks */
#define STM32_CLOCK_BUS_AHB1 0x088
#define STM32_CLOCK_BUS_AHB2 0x08C
diff --git a/include/zephyr/dt-bindings/clock/stm32wb_clock.h b/include/zephyr/dt-bindings/clock/stm32wb_clock.h
index ec3a3f2..48991cd 100644
--- a/include/zephyr/dt-bindings/clock/stm32wb_clock.h
+++ b/include/zephyr/dt-bindings/clock/stm32wb_clock.h
@@ -34,9 +34,6 @@
#define STM32_SRC_PLLCLK 0x008
/* TODO: PLLSAI clocks */
-#define STM32_SRC_CLOCK_MIN STM32_SRC_HSI
-#define STM32_SRC_CLOCK_MAX STM32_SRC_PLLCLK
-
/**
* @brief STM32 clock configuration bit field.
*
diff --git a/include/zephyr/dt-bindings/clock/stm32wl_clock.h b/include/zephyr/dt-bindings/clock/stm32wl_clock.h
index 202da3e..d1afc23 100644
--- a/include/zephyr/dt-bindings/clock/stm32wl_clock.h
+++ b/include/zephyr/dt-bindings/clock/stm32wl_clock.h
@@ -33,9 +33,6 @@
/** PLL clock */
#define STM32_SRC_PLLCLK 0x007
-#define STM32_SRC_CLOCK_MIN STM32_SRC_HSI
-#define STM32_SRC_CLOCK_MAX STM32_SRC_PLLCLK
-
/**
* @brief STM32 clock configuration bit field.
*
