blob: 25e9d451bdd5a12edf57ebc253b15d0c2d7144b2 [file] [log] [blame]
/*
* Copyright (c) 2019 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/h7/stm32h745.dtsi>
#include <zephyr/dt-bindings/mipi_dsi/mipi_dsi.h>
/ {
soc {
compatible = "st,stm32h747", "st,stm32h7", "simple-bus";
mipi_dsi: dsihost@50000000 {
compatible = "st,stm32-mipi-dsi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x50000000 0x1000>;
clock-names = "dsiclk", "refclk", "pixelclk";
clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00000010>,
<&rcc STM32_SRC_HSE NO_SEL>,
<&rcc STM32_SRC_PLL3_R NO_SEL>;
resets = <&rctl STM32_RESET(APB3, 4U)>;
status = "disabled";
};
};
};