blob: 8c60af4b83d87517dc616592ccb93267fffb21af [file] [log] [blame]
/*
* Copyright (c) 2024 TOKITA Hiroshi
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <arm/renesas/ra/ra2/ra2xx.dtsi>
#include <zephyr/dt-bindings/clock/ra_clock.h>
/delete-node/ &sci2;
/delete-node/ &sci3;
/delete-node/ &ioport6;
/delete-node/ &ioport7;
/delete-node/ &ioport8;
/ {
soc {
sram0: memory@20000000 {
compatible = "mmio-sram";
reg = <0x20000000 DT_SIZE_K(32)>;
};
};
clocks: clocks {
#address-cells = <1>;
#size-cells = <1>;
xtal: clock-main-osc {
compatible = "renesas,ra-cgc-external-clock";
clock-frequency = <DT_FREQ_M(12)>;
#clock-cells = <0>;
status = "disabled";
};
hoco: clock-hoco {
compatible = "fixed-clock";
clock-frequency = <DT_FREQ_M(48)>;
#clock-cells = <0>;
};
moco: clock-moco {
compatible = "fixed-clock";
clock-frequency = <DT_FREQ_M(8)>;
#clock-cells = <0>;
};
loco: clock-loco {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
subclk: clock-subclk {
compatible = "renesas,ra-cgc-subclk";
clock-frequency = <32768>;
#clock-cells = <0>;
status = "disabled";
};
pclkblock: pclkblock@4001e01c {
compatible = "renesas,ra-cgc-pclk-block";
reg = <0x4001e01c 4>, <0x40047000 4>, <0x40047004 4>,
<0x40047008 4>;
reg-names = "MSTPA", "MSTPB","MSTPC",
"MSTPD";
#clock-cells = <0>;
clocks = <&hoco>;
status = "okay";
iclk: iclk {
compatible = "renesas,ra-cgc-pclk";
div = <1>;
#clock-cells = <2>;
status = "okay";
};
pclkb: pclkb {
compatible = "renesas,ra-cgc-pclk";
div = <2>;
#clock-cells = <2>;
status = "okay";
};
pclkd: pclkd {
compatible = "renesas,ra-cgc-pclk";
div = <1>;
#clock-cells = <2>;
status = "okay";
};
fclk: fclk {
compatible = "renesas,ra-cgc-pclk";
div = <1>;
#clock-cells = <2>;
status = "okay";
};
clkout: clkout {
compatible = "renesas,ra-cgc-pclk";
#clock-cells = <2>;
status = "disabled";
};
sdadcclk: sdadcclk {
compatible = "renesas,ra-cgc-pclk";
#clock-cells = <2>;
status = "disabled";
};
};
};
};