dts/arm/renesas/ra/ra8/r7fa8m1xh.dtsi

/*
 * Copyright (c) 2024 Renesas Electronics Corporation
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <arm/renesas/ra/ra8/ra8x1.dtsi>
#include <zephyr/dt-bindings/clock/ra_clock.h>

/ {
	clocks: clocks {
		#address-cells = <1>;
		#size-cells = <1>;

		xtal: clock-main-osc {
			compatible = "renesas,ra-cgc-external-clock";
			clock-frequency = <DT_FREQ_M(20)>;
			#clock-cells = <0>;
			status = "disabled";
		};

		hoco: clock-hoco {
			compatible = "fixed-clock";
			clock-frequency = <DT_FREQ_M(48)>;
			#clock-cells = <0>;
		};

		moco: clock-moco {
			compatible = "fixed-clock";
			clock-frequency = <DT_FREQ_M(8)>;
			#clock-cells = <0>;
		};

		loco: clock-loco {
			compatible = "fixed-clock";
			clock-frequency = <32768>;
			#clock-cells = <0>;
		};

		subclk: clock-subclk {
			compatible = "renesas,ra-cgc-subclk";
			clock-frequency = <32768>;
			#clock-cells = <0>;
			status = "disabled";
		};

		pll: pll {
			compatible = "renesas,ra-cgc-pll";
			#clock-cells = <0>;

			/* PLL */
			clocks = <&xtal>;
			div = <2>;
			mul = <96 0>;
			divp = <2>;
			freqp = <DT_FREQ_M(480)>;
			divq = <2>;
			freqq = <DT_FREQ_M(480)>;
			divr = <2>;
			freqr = <DT_FREQ_M(480)>;
			status = "disabled";
		};

		pll2: pll2 {
			compatible = "renesas,ra-cgc-pll";
			#clock-cells = <0>;

			/* PLL2 */
			div = <2>;
			mul = <96 0>;
			divp = <2>;
			freqp = <DT_FREQ_M(0)>;
			divq = <2>;
			freqq = <DT_FREQ_M(0)>;
			divr = <2>;
			freqr = <DT_FREQ_M(0)>;
			status = "disabled";
		};

		pclkblock: pclkblock@40203000 {
			compatible = "renesas,ra-cgc-pclk-block";
			reg = <0x40203000 4>, <0x40203004 4>, <0x40203008 4>,
			      <0x4020300c 4>, <0x40203010 4>;
			reg-names = "MSTPA", "MSTPB","MSTPC",
				    "MSTPD", "MSTPE";
			#clock-cells = <0>;
			clocks = <&pll>;
			status = "okay";

			cpuclk: cpuclk {
				compatible = "renesas,ra-cgc-pclk";
				div = <1>;
				#clock-cells = <2>;
				status = "okay";
			};

			iclk: iclk {
				compatible = "renesas,ra-cgc-pclk";
				div = <2>;
				#clock-cells = <2>;
				status = "okay";
			};

			pclka: pclka {
				compatible = "renesas,ra-cgc-pclk";
				div = <4>;
				#clock-cells = <2>;
				status = "okay";
			};

			pclkb: pclkb {
				compatible = "renesas,ra-cgc-pclk";
				div = <8>;
				#clock-cells = <2>;
				status = "okay";
			};

			pclkc: pclkc {
				compatible = "renesas,ra-cgc-pclk";
				div = <8>;
				#clock-cells = <2>;
				status = "okay";
			};

			pclkd: pclkd {
				compatible = "renesas,ra-cgc-pclk";
				div = <4>;
				#clock-cells = <2>;
				status = "okay";
			};

			pclke: pclke {
				compatible = "renesas,ra-cgc-pclk";
				div = <2>;
				#clock-cells = <2>;
				status = "okay";
			};

			bclk: bclk {
				compatible = "renesas,ra-cgc-pclk";
				div = <4>;
				bclkout: bclkout {
					compatible = "renesas,ra-cgc-busclk";
					clk-out-div = <2>;
					sdclk = <1>;
					#clock-cells = <0>;
				};
				#clock-cells = <2>;
				status = "okay";
			};

			fclk: fclk {
				compatible = "renesas,ra-cgc-pclk";
				div = <8>;
				#clock-cells = <2>;
				status = "okay";
			};

			clkout: clkout {
				compatible = "renesas,ra-cgc-pclk";
				#clock-cells = <2>;
				status = "disabled";
			};

			sciclk: sciclk {
				compatible = "renesas,ra-cgc-pclk";
				#clock-cells = <2>;
				status = "disabled";
			};

			spiclk: spiclk {
				compatible = "renesas,ra-cgc-pclk";
				#clock-cells = <2>;
				status = "disabled";
			};

			canfdclk: canfdclk {
				compatible = "renesas,ra-cgc-pclk";
				#clock-cells = <2>;
				status = "disabled";
			};

			i3cclk: i3cclk {
				compatible = "renesas,ra-cgc-pclk";
				#clock-cells = <2>;
				status = "disabled";
			};

			uclk: uclk {
				compatible = "renesas,ra-cgc-pclk";
				#clock-cells = <2>;
				status = "disabled";
			};

			u60clk: u60clk {
				compatible = "renesas,ra-cgc-pclk";
				#clock-cells = <2>;
				status = "disabled";
			};

			octaspiclk: octaspiclk {
				compatible = "renesas,ra-cgc-pclk";
				#clock-cells = <2>;
				status = "disabled";
			};
		};
	};
};