boards/we/ophelia1ev/we_ophelia1ev_nrf52805-pinctrl.dtsi

&pinctrl {
	i2c0_default: i2c0_default {
		group1 {
			psels = <NRF_PSEL(TWIM_SDA, 0, 16)>,
				<NRF_PSEL(TWIM_SCL, 0, 18)>;
		};
	};

	i2c0_sleep: i2c0_sleep {
		group1 {
			psels = <NRF_PSEL(TWIM_SDA, 0, 16)>,
				<NRF_PSEL(TWIM_SCL, 0, 18)>;
			low-power-enable;
		};
	};

	spi0_default: spi0_default {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 0, 14)>,
				<NRF_PSEL(SPIM_MOSI, 0, 16)>,
				<NRF_PSEL(SPIM_MISO, 0, 18)>;
		};
	};

	spi0_sleep: spi0_sleep {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 0, 14)>,
				<NRF_PSEL(SPIM_MOSI, 0, 16)>,
				<NRF_PSEL(SPIM_MISO, 0, 18)>;
			low-power-enable;
		};
	};

	uart0_default: uart0_default {
		group1 {
			psels = <NRF_PSEL(UART_TX, 0, 16)>,
				<NRF_PSEL(UART_RTS, 0, 4)>;
		};
		group2 {
			psels = <NRF_PSEL(UART_RX, 0, 18)>,
				<NRF_PSEL(UART_CTS, 0, 14)>;
			bias-pull-up;
		};
	};

	uart0_sleep: uart0_sleep {
		group1 {
			psels = <NRF_PSEL(UART_TX, 0, 16)>,
				<NRF_PSEL(UART_RX, 0, 18)>,
				<NRF_PSEL(UART_RTS, 0, 4)>,
				<NRF_PSEL(UART_CTS, 0, 14)>;
			low-power-enable;
		};
	};

};