blob: dc2e25a4e0d997dd479a42c6962a41779e195720 [file] [log] [blame]
#include <common/mem.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr-sw.h>
/ {
mem_cache: memory@20008000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x20008000 0x1000>;
zephyr,memory-region = "MEM_CACHEABLE";
zephyr,memory-attr = <( DT_MEM_CACHEABLE )>;
};
mem_cache_sw: memory@20009000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x20009000 0x1000>;
zephyr,memory-region = "MEM_CACHEABLE_SW";
zephyr,memory-attr = <( DT_MEM_CACHEABLE | DT_MEM_SW_ALLOC_CACHE )>;
};
mem_noncache_sw: memory@2000A000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x2000A000 0x1000>;
zephyr,memory-region = "MEM_NON_CACHEABLE_SW";
zephyr,memory-attr = <( DT_MEM_SW_ALLOC_NON_CACHE )>;
};
mem_dma_sw: memory@2000B000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x2000B000 0x1000>;
zephyr,memory-region = "MEM_DMA_SW";
zephyr,memory-attr = <( DT_MEM_DMA | DT_MEM_SW_ALLOC_DMA )>;
};
mem_cache_sw_big: memory@2000C000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x2000C000 0x2000>;
zephyr,memory-region = "MEM_CACHEABLE_SW_BIG";
zephyr,memory-attr = <( DT_MEM_CACHEABLE | DT_MEM_SW_ALLOC_CACHE )>;
};
mem_cache_cache_dma_multi: memory@2000E000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x2000E000 0x1000>;
zephyr,memory-region = "MEM_CACHEABLE_SW_MULTI_ATTR";
zephyr,memory-attr = <( DT_MEM_CACHEABLE | DT_MEM_DMA |
DT_MEM_SW_ALLOC_CACHE | DT_MEM_SW_ALLOC_DMA)>;
};
};
&sram0 {
reg = <0x20000000 DT_SIZE_K(32)>;
};