dts/arm/renesas/rcar/gen4/rcar_gen4_cr52.dtsi

/*
 * Copyright (c) 2023 IoT.bzh
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <mem.h>
#include <arm64/armv8-r.dtsi>
#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
#include <zephyr/dt-bindings/clock/renesas_cpg_mssr.h>

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-r52";
			reg = <0>;
		};
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupt-parent = <&gic>;
		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL
				 IRQ_DEFAULT_PRIORITY>,
				<GIC_PPI 14 IRQ_TYPE_LEVEL
				 IRQ_DEFAULT_PRIORITY>,
				<GIC_PPI 11 IRQ_TYPE_LEVEL
				 IRQ_DEFAULT_PRIORITY>,
				<GIC_PPI 10 IRQ_TYPE_LEVEL
				 IRQ_DEFAULT_PRIORITY>;
	};

	soc {
		interrupt-parent = <&gic>;

		sram0: memory@40040000 {
			compatible = "mmio-sram";
			reg = <0x40040000 0x100000>;
		};

		gic: interrupt-controller@f0000000 {
			compatible = "arm,gic-v3", "arm,gic";
			reg = <0xf0000000 0x1000>,
				  <0xf0100000 0x20000>;
			interrupt-controller;
			#interrupt-cells = <4>;
			status = "okay";
		};

		scif0: serial@e6e60000 {
			compatible = "renesas,rcar-scif";
			reg = <0xe6e60000 0x64>;
			current-speed = <115200>;
			status = "disabled";
		};

		scif3: serial@e6c50000 {
			compatible = "renesas,rcar-scif";
			reg = <0xe6c50000 0x64>;
			current-speed = <115200>;
			status = "disabled";
		};
	};
};