| # Copyright 2024 NXP |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| if SOC_SERIES_IMXRT11XX |
| |
| config NUM_IRQS |
| default 218 |
| |
| config GPIO |
| default y |
| |
| if CORTEX_M_SYSTICK |
| |
| config SYS_CLOCK_HW_CYCLES_PER_SEC |
| default 996000000 if SOC_MIMXRT1176_CM7 |
| default 600000000 if SOC_MIMXRT1166_CM7 |
| default 400000000 if SOC_MIMXRT1176_CM4 |
| default 240000000 if SOC_MIMXRT1166_CM4 |
| |
| endif # CORTEX_M_SYSTICK |
| |
| config DCDC_VALUE |
| default 0x13 |
| |
| config FLEXSPI_CONFIG_BLOCK_OFFSET |
| default 0x400 if BOOT_FLEXSPI_NOR |
| |
| if SECOND_CORE_MCUX |
| |
| # RT Boot header is only needed on primary core |
| config NXP_IMXRT_BOOT_HEADER |
| default y |
| depends on !(CPU_CORTEX_M4 || BOOTLOADER_MCUBOOT) |
| |
| endif |
| endif |
