| # Copyright (c) 2020 Intel Corporation |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| if SOC_INTEL_CAVS_V15 |
| |
| config SOC_TOOLCHAIN_NAME |
| string |
| default "intel_apl_adsp" |
| |
| config SOC |
| default "intel_apl_adsp" |
| |
| # For backward compatibility, to be removed |
| config SOC_SERIES_INTEL_CAVS_V15 |
| def_bool y |
| |
| config HP_SRAM_RESERVE |
| default 32768 |
| |
| config MP_MAX_NUM_CPUS |
| default 2 |
| |
| config SCHED_IPI_SUPPORTED |
| default y |
| |
| config SYS_CLOCK_HW_CYCLES_PER_SEC |
| default 400000000 if XTENSA_TIMER |
| default 19200000 if INTEL_ADSP_TIMER |
| |
| if DAI_INTEL_SSP |
| |
| config DAI_SSP_CLK_FORCE_DYNAMIC_CLOCK_GATING |
| default y |
| |
| config DAI_INTEL_SSP_NUM_BASE |
| default 4 |
| |
| config DAI_INTEL_SSP_NUM_EXT |
| default 2 |
| |
| endif # DAI_INTEL_SSP |
| |
| config ADSP_INIT_HPSRAM |
| default n |
| |
| config ADSP_DISABLE_L2CACHE_AT_BOOT |
| default y |
| endif |