|  | /* | 
|  | * Copyright (c) 2018 Linaro Limited | 
|  | * | 
|  | * SPDX-License-Identifier: Apache-2.0 | 
|  | */ | 
|  |  | 
|  | /** | 
|  | * @file | 
|  | * @brief System/hardware module for STM32WB processor | 
|  | */ | 
|  |  | 
|  | #include <device.h> | 
|  | #include <init.h> | 
|  | #include <arch/cpu.h> | 
|  | #include <arch/arm/aarch32/cortex_m/cmsis.h> | 
|  |  | 
|  | /** | 
|  | * @brief Perform basic hardware initialization at boot. | 
|  | * | 
|  | * This needs to be run from the very beginning. | 
|  | * So the init priority has to be 0 (zero). | 
|  | * | 
|  | * @return 0 | 
|  | */ | 
|  | static int stm32wb_init(const struct device *arg) | 
|  | { | 
|  | uint32_t key; | 
|  |  | 
|  | ARG_UNUSED(arg); | 
|  |  | 
|  | key = irq_lock(); | 
|  |  | 
|  | /* Install default handler that simply resets the CPU | 
|  | * if configured in the kernel, NOP otherwise | 
|  | */ | 
|  | NMI_INIT(); | 
|  |  | 
|  | irq_unlock(key); | 
|  |  | 
|  | /* Update CMSIS SystemCoreClock variable (HCLK) */ | 
|  | /* At reset, system core clock is set to 4 MHz from MSI */ | 
|  | SystemCoreClock = 4000000; | 
|  |  | 
|  | return 0; | 
|  | } | 
|  |  | 
|  | SYS_INIT(stm32wb_init, PRE_KERNEL_1, 0); |