blob: d4326c422a228a0bca05becb6cb7065e8a6c2f4d [file] [log] [blame]
/*
* NOTE: Autogenerated file by gen_board_pinctrl.py
* for MKL25Z128VLK4/signal_configuration.xml
*
* Copyright (c) 2022, NXP
* SPDX-License-Identifier: Apache-2.0
*/
#include <nxp/kinetis/MKL25Z128VLK4-pinctrl.h>
&pinctrl {
adc0_default: adc0_default {
group0 {
pinmux = <ADC0_SE12_PTB2>;
drive-strength = "low";
slew-rate = "slow";
};
};
i2c0_default: i2c0_default {
group0 {
pinmux = <I2C0_SCL_PTE24>,
<I2C0_SDA_PTE25>;
drive-strength = "low";
slew-rate = "slow";
};
};
uart0_default: uart0_default {
group0 {
pinmux = <UART0_RX_PTA1>,
<UART0_TX_PTA2>;
drive-strength = "low";
slew-rate = "slow";
};
};
};