| # Copyright (c) 2023 Intel Corporation |
| # SPDX-License-Identifier: Apache-2.0 |
| depends on DT_HAS_CDNS_SDHC_ENABLED |
| select SDHC_SUPPORTS_NATIVE_MODE |
| Enable Cadence SDMMC Host Controller. |
| # Cadence SDHC DMA needs 64 bit aligned buffers |
| config SDHC_BUFFER_ALIGNMENT |
| int "Allocate number of descriptors" |
| SD host controllers require DMA preparation for read and write operation. |
| Creates static descriptors which can be used by ADMA. Devices should |
| configure this flag if they require to transfer more than 8*64Kb of data. |
