blob: 148d7261d9e6aeec66485b1831f70f04b4b8954a [file] [log] [blame]
# Copyright (c) 2020 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_INTEL_CAVS_V25
config SOC_SERIES
string
default "cavs_v25"
config SOC_TOOLCHAIN_NAME
string
default "intel_s1000"
config SOC
string
default "intel_cavs_25"
# Hardware has four cores, limited to two pending test fixes
config MP_NUM_CPUS
default 2
config SMP
default y
config XTENSA_TIMER
default n
config CAVS_TIMER
default y
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 400000000 if XTENSA_TIMER
default 38400000 if CAVS_TIMER
config SYS_CLOCK_TICKS_PER_SEC
default 50000
config KERNEL_ENTRY
default "_MainEntry"
config MULTI_LEVEL_INTERRUPTS
default y
config 2ND_LEVEL_INTERRUPTS
default y
config DYNAMIC_INTERRUPTS
default y
config CAVS_ICTL_0_OFFSET
default 6
config CAVS_ICTL_1_OFFSET
default 10
config CAVS_ICTL_2_OFFSET
default 13
config CAVS_ICTL_3_OFFSET
default 16
config 2ND_LVL_INTR_00_OFFSET
default CAVS_ICTL_0_OFFSET
config 2ND_LVL_INTR_01_OFFSET
default CAVS_ICTL_1_OFFSET
config 2ND_LVL_INTR_02_OFFSET
default CAVS_ICTL_2_OFFSET
config 2ND_LVL_INTR_03_OFFSET
default CAVS_ICTL_3_OFFSET
config MAX_IRQ_PER_AGGREGATOR
default 32
config NUM_2ND_LEVEL_AGGREGATORS
default 4
config 2ND_LVL_ISR_TBL_OFFSET
default 21
config CAVS_ISR_TBL_OFFSET
default 2ND_LVL_ISR_TBL_OFFSET
if LOG
config LOG_BACKEND_ADSP
default y
endif # LOG
if KERNEL_VM_SUPPORT
config KERNEL_VM_SIZE
default 0x800000
endif
endif # SOC_SERIES_INTEL_CAVS_V25