| /* |
| * Copyright (c) 2022 Nordic Semiconductor |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| &pinctrl { |
| uart0_default: uart0_default { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 0, 29)>, |
| <NRF_PSEL(UART_RX, 0, 30)>; |
| }; |
| }; |
| |
| uart0_sleep: uart0_sleep { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 0, 29)>, |
| <NRF_PSEL(UART_RX, 0, 30)>; |
| low-power-enable; |
| }; |
| }; |
| |
| uart1_default: uart1_default { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 0, 14)>, |
| <NRF_PSEL(UART_RX, 0, 15)>; |
| }; |
| }; |
| |
| uart1_sleep: uart1_sleep { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 0, 14)>, |
| <NRF_PSEL(UART_RX, 0, 15)>; |
| low-power-enable; |
| }; |
| }; |
| |
| uart2_default: uart2_default { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 0, 18)>, |
| <NRF_PSEL(UART_RX, 0, 19)>; |
| }; |
| }; |
| |
| uart2_sleep: uart2_sleep { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 0, 18)>, |
| <NRF_PSEL(UART_RX, 0, 19)>; |
| low-power-enable; |
| }; |
| }; |
| |
| i2c2_default: i2c2_default { |
| group1 { |
| psels = <NRF_PSEL(TWIM_SDA, 0, 25)>, |
| <NRF_PSEL(TWIM_SCL, 0, 26)>; |
| }; |
| }; |
| |
| i2c2_sleep: i2c2_sleep { |
| group1 { |
| psels = <NRF_PSEL(TWIM_SDA, 0, 25)>, |
| <NRF_PSEL(TWIM_SCL, 0, 26)>; |
| low-power-enable; |
| }; |
| }; |
| |
| pwm0_default: pwm0_default { |
| group1 { |
| psels = <NRF_PSEL(PWM_OUT0, 0, 5)>, |
| <NRF_PSEL(PWM_OUT1, 0, 6)>, |
| <NRF_PSEL(PWM_OUT2, 0, 7)>; |
| nordic,invert; |
| }; |
| }; |
| |
| pwm0_sleep: pwm0_sleep { |
| group1 { |
| psels = <NRF_PSEL(PWM_OUT0, 0, 5)>, |
| <NRF_PSEL(PWM_OUT1, 0, 6)>, |
| <NRF_PSEL(PWM_OUT2, 0, 7)>; |
| low-power-enable; |
| }; |
| }; |
| |
| pwm1_default: pwm1_default { |
| group1 { |
| psels = <NRF_PSEL(PWM_OUT0, 0, 4)>, |
| <NRF_PSEL(PWM_OUT1, 0, 9)>; |
| nordic,invert; |
| }; |
| }; |
| |
| pwm1_sleep: pwm1_sleep { |
| group1 { |
| psels = <NRF_PSEL(PWM_OUT0, 0, 4)>, |
| <NRF_PSEL(PWM_OUT1, 0, 9)>; |
| low-power-enable; |
| }; |
| }; |
| |
| }; |