blob: 74ce1982e901a8aaf18e69ebcfdc81fdc1811faa [file] [log] [blame]
/*
* Copyright (c) 2024-2025 Renesas Electronics Corporation
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <renesas/ra/ra8/r7fa8d1bhecbd.dtsi>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
#include <zephyr/dt-bindings/memory-controller/renesas,ra-sdram.h>
#include <zephyr/dt-bindings/adc/adc.h>
#include "ek_ra8d1-pinctrl.dtsi"
/ {
model = "Renesas EK-RA8D1";
compatible = "renesas,ra8d1", "renesas,ra8";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,console = &uart9;
zephyr,shell-uart = &uart9;
zephyr,entropy = &trng;
zephyr,flash-controller = &flash1;
zephyr,canbus = &canfd0;
};
leds {
compatible = "gpio-leds";
led1: led1 {
gpios = <&ioport6 0 GPIO_ACTIVE_HIGH>;
label = "LED1";
};
led2: led2 {
gpios = <&ioport4 14 GPIO_ACTIVE_HIGH>;
label = "LED2";
};
led3: led3 {
gpios = <&ioport1 7 GPIO_ACTIVE_HIGH>;
label = "LED3";
};
};
buttons {
compatible = "gpio-keys";
button0: s1 {
gpios = <&ioport0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button switch 1";
zephyr,code = <INPUT_KEY_0>;
};
button1: s2 {
gpios = <&ioport0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button switch 2";
zephyr,code = <INPUT_KEY_1>;
};
};
sdram1: sdram@68000000 {
compatible = "zephyr,memory-region", "mmio-sram";
device_type = "memory";
reg = <0x68000000 DT_SIZE_M(64)>; /* 512 Mbits */
zephyr,memory-region = "SDRAM";
status = "okay";
};
renesas_mipi_connector: mipi-connector {
compatible = "renesas,ra-gpio-mipi-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <14 0 &ioport5 11 0>, /* IIC_SDA */
<15 0 &ioport4 4 0>, /* DISP_BLEN */
<16 0 &ioport5 12 0>, /* IIC_SCL */
<17 0 &ioport5 10 0>, /* DISP_INT */
<18 0 &ioporta 1 0>; /* DISP_RST */
};
aliases {
led0 = &led1;
sw0 = &button0;
sw1 = &button1;
mipi-dsi = &mipi_dsi;
};
};
&xtal {
clock-frequency = <DT_FREQ_M(20)>;
mosel = <0>;
#clock-cells = <0>;
status = "okay";
};
&subclk {
status = "okay";
};
&pll {
status = "okay";
pllp {
status = "okay";
};
pllq {
status = "okay";
};
pllr {
status = "okay";
};
};
&sciclk {
clocks = <&pllp>;
div = <4>;
status = "okay";
};
&canfdclk {
clocks = <&pll>;
div = <5>;
status = "okay";
};
&lcdclk {
clocks = <&pll>;
div = <2>;
status = "okay";
};
&ioport0 {
status = "okay";
};
&ioport1 {
status = "okay";
};
&ioport4 {
status = "okay";
};
&ioport5 {
status = "okay";
};
&ioport6 {
status = "okay";
};
&ioporta {
status = "okay";
};
&sci9 {
pinctrl-0 = <&sci9_default>;
pinctrl-names = "default";
status = "okay";
uart9: uart {
current-speed = <115200>;
status = "okay";
};
};
&trng {
status = "okay";
};
&spi1 {
pinctrl-0 = <&spi1_default>;
pinctrl-names = "default";
status = "okay";
};
&flash1 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
storage_partition: partition@0 {
label = "storage";
reg = <0X0 DT_SIZE_K(12)>;
};
};
};
&pwm7 {
pinctrl-0 = <&pwm7_default>;
interrupts = <40 1>, <41 1>;
interrupt-names = "gtioca", "overflow";
pinctrl-names = "default";
status = "okay";
};
&canfd_global {
status = "okay";
canfd0 {
pinctrl-0 = <&canfd0_default>;
pinctrl-names = "default";
rx-max-filters = <16>;
status = "okay";
};
};
&iic1 {
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <DT_FREQ_M(1)>;
pinctrl-0 = <&iic1_default>;
pinctrl-names = "default";
};
&eth {
local-mac-address = [74 90 50 B0 5D E9];
status = "okay";
phy-handle = <&phy>;
};
&mdio {
pinctrl-0 = <&ether_default>;
pinctrl-names = "default";
status = "okay";
phy: ethernet-phy@5 {
compatible = "ethernet-phy";
reg = <5>;
status = "okay";
};
};
&usbhs {
pinctrl-0 = <&usbhs_default>;
pinctrl-names = "default";
maximum-speed = "high-speed";
status = "okay";
zephyr_udc0: udc {
status = "okay";
};
};
&usbhs_phy {
phys-clock-src = "xtal";
};
&adc0 {
status = "okay";
pinctrl-0 = <&adc0_default>;
pinctrl-names = "default";
};
&port_irq12 {
interrupts = <88 12>;
status = "okay";
};
&port_irq13 {
interrupts = <89 12>;
status = "okay";
};
&sdram {
pinctrl-0 = <&sdram_default>;
pinctrl-names = "default";
status = "okay";
auto-refresh-interval = <SDRAM_AUTO_REFREDSH_INTERVEL_10CYCLES>;
auto-refresh-count = <SDRAM_AUTO_REFREDSH_COUNT_8TIMES>;
precharge-cycle-count = <SDRAM_AUTO_PRECHARGE_CYCLE_3CYCLES>;
multiplex-addr-shift = "10-bit";
edian-mode = "little-endian";
continuous-access;
bus-width = "16-bit";
bank@0 {
reg = <0>;
renesas,ra-sdram-timing = <SDRAM_TRAS_6CYCLES
SDRAM_TRCD_3CYCLES
SDRAM_TRP_3CYCLES
SDRAM_TWR_2CYCLES
SDRAM_TCL_3CYCLES
937
SDRAM_TREFW_8CYCLES>;
};
};
zephyr_lcdif: &lcdif {
pinctrl-0 = <&glcdc_default>;
pinctrl-names = "default";
};
zephyr_mipi_dsi: &mipi_dsi {};
renesas_mipi_i2c: &iic1{};
pmod_sd_shield: &sdhc1 {};