blob: 043d35adcf41e454c3b7779affc434843ef8aac4 [file] [log] [blame]
/*
* Copyright (c) 2024 Nordic Semiconductor
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
/omit-if-no-ref/ uart20_default: uart20_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 4)>,
<NRF_PSEL(UART_RTS, 1, 6)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 1, 5)>,
<NRF_PSEL(UART_CTS, 1, 7)>;
bias-pull-up;
};
};
/omit-if-no-ref/ uart20_sleep: uart20_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 4)>,
<NRF_PSEL(UART_RX, 1, 5)>,
<NRF_PSEL(UART_RTS, 1, 6)>,
<NRF_PSEL(UART_CTS, 1, 7)>;
low-power-enable;
};
};
/omit-if-no-ref/ uart30_default: uart30_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 0)>,
<NRF_PSEL(UART_RTS, 0, 2)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 1)>,
<NRF_PSEL(UART_CTS, 0, 3)>;
bias-pull-up;
};
};
/omit-if-no-ref/ uart30_sleep: uart30_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 0)>,
<NRF_PSEL(UART_RX, 0, 1)>,
<NRF_PSEL(UART_RTS, 0, 2)>,
<NRF_PSEL(UART_CTS, 0, 3)>;
low-power-enable;
};
};
/omit-if-no-ref/ spi00_default: spi00_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 2, 1)>,
<NRF_PSEL(SPIM_MOSI, 2, 2)>,
<NRF_PSEL(SPIM_MISO, 2, 4)>;
};
};
/omit-if-no-ref/ spi00_sleep: spi00_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 2, 1)>,
<NRF_PSEL(SPIM_MOSI, 2, 2)>,
<NRF_PSEL(SPIM_MISO, 2, 4)>;
low-power-enable;
};
};
};