| # Copyright (c) 2021 Arm Limited (or its affiliates). All rights reserved. |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| choice |
| prompt "ARM FVP AEMv8R AArch64 SoCs" |
| depends on SOC_SERIES_FVP_AEMV8R |
| |
| config SOC_FVP_AEMV8R_AARCH64 |
| bool "ARM FVP AEMv8R aarch64 simulation" |
| select CPU_CORTEX_R82 |
| select CPU_HAS_MPU |
| select GIC_V3 |
| select GIC_SINGLE_SECURITY_STATE |
| |
| endchoice |
| |
| config SOC_FVP_AEMV8R_SIMULATE_CPU_PM |
| bool "Simulate CPU Power Management for FVP_BaseR_AEMv8R" |
| default n |
| help |
| It simulates the cpu power management function for |
| FVP_BaseR_AEMv8R. When zephyr kernel try to bring up secondary |
| core through pm_cpu_on(), it always succeeds because |
| it indeed bring up secondary core successfully. |
| |
| config SOC_FVP_AEMV8R_EL2_INIT |
| bool "ARM FVP AEMv8R EL2 Initialization" |
| default n |
| help |
| Initialize MPIDR_EL1 in z_arm64_el2_plat_init. It's necessary |
| when zephyr brings up secondary core without TB-R support. |
