soc/xtensa/intel_adsp/cavs/Kconfig.defconfig.cavs_v20

# Copyright (c) 2020,2022 Intel Corporation
# SPDX-License-Identifier: Apache-2.0

if SOC_INTEL_CAVS_V20

config SOC_TOOLCHAIN_NAME
	string
	default "intel_s1000"

config SOC
	string
	default "intel_icl_adsp"

# For backward compatibility, to be removed
config SOC_SERIES_INTEL_CAVS_V20
	def_bool y

config SMP
	default y

# FIXME: these DSPs can have more cores, but Zephyr only supports up to 2 cores on them
config MP_NUM_CPUS
	default 2

config SCHED_IPI_SUPPORTED
	default y

config XTENSA_TIMER
	default n

config INTEL_ADSP_TIMER
	default y

config SYS_CLOCK_HW_CYCLES_PER_SEC
	default 400000000 if XTENSA_TIMER
	default 38400000 if INTEL_ADSP_TIMER

config SYS_CLOCK_TICKS_PER_SEC
	default 50000

config KERNEL_ENTRY
	default "_MainEntry"

config MULTI_LEVEL_INTERRUPTS
	default y

config 2ND_LEVEL_INTERRUPTS
	default y

config DYNAMIC_INTERRUPTS
	default y

if LOG

config LOG_BACKEND_ADSP
	default y

endif # LOG

endif # SOC_INTEL_CAVS_V20