dts/bindings/pinctrl/nxp,imx7d-pinctrl.yaml

# Copyright (c) 2022 NXP
# SPDX-License-Identifier: Apache-2.0

description: |
  The node has the 'pinctrl' node label set in MCUX SoC's devicetree. These
  nodes can be autogenerated using the MCUXpresso config tools combined with
  the imx_dts_gen.py script in NXP's HAL. The mux, mode, input, daisy, and cfg
  fields in a group select the pins to be configured, and the remaining
  devicetree properties set configuration values for those pins

  Note that the soc level iomuxc dts file can be examined to find the possible
  pinmux options. Here are the affects of each property on the
  IOMUXC SW_PAD_CTL register:
  bias-pull-up: PE=1, PS=<bias-pull-up-value index>
  bias-pull-down: PE=1, PS=0
  input-schmitt-enable: HYS=1
  slew-rate: SRE=<enum idx>
  drive-strength: DSE=<enum idx>
  input-enable: SION=1 (in SW_PAD_CTL_MUX register)

  If only required properties are supplied, the pin will have the following
  configuration:
  HYS=0,
  PS=0,
  PE=0
  SRE=<slew-rate>,
  DSE=<drive-strength>,
  SION=0,

  Note that pins marked with LPSR can only have their PE and PS registers
  configured


compatible: "nxp,imx7d-pinctrl"

include:
    - name: base.yaml
    - name: pincfg-node-group.yaml
      child-binding:
        child-binding:
          property-allowlist:
            - input-schmitt-enable
            - input-enable
            - bias-pull-up
            - bias-pull-down

child-binding:
  description: iMX pin controller pin group
  child-binding:
    description: |
      iMX pin controller pin configuration node.
    properties:
      pinmux:
        required: true
        type: phandles
        description: |
          Pin mux selections for this group. See the soc level iomuxc DTSI file
          for a defined list of these options.
      drive-strength:
        required: true
        type: string
        enum:
          - "x1"
          - "x4"
          - "x2"
          - "x6"
        description: |
          Pin output drive strength. Sets the DSE field in the IOMUXC peripheral.
      slew-rate:
        required: true
        type: string
        enum:
          - "fast"
          - "slow"
        description: |
          Select slew rate for pin. Corresponds to SRE field in IOMUXC peripheral
          0 FAST — Fast Frequency Slew Rate
          1 SLOW — Slow Frequency Slew Rate
      bias-pull-up-value:
        required: false
        type: string
        default: "100k"
        enum:
          - "unused"
          - "5k"
          - "47k"
          - "100k"
        description: |
          Select pull up resistor value. Sets PS field in IOMUXC peripheral.
          Default of 100k as this is most common default register value for
          SOC pads.
          01: 5K- 5K pull up resistor
          10: 47K- 47K pull up resistor
          11: 100K- 100K pull up resistor