blob: 5e8e2ed2fa0ea8d1877e83e3046ff2d68a6b2757 [file] [log] [blame]
/*
* Copyright (c) 2024 STMicroelectronics
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/wb0/stm32wb0.dtsi>
/ {
soc {
compatible = "st,stm32wb07", "st,stm32wb0", "simple-bus";
flash: flash-controller@40001000 {
flash0: flash@10040000 {
reg = <0x10040000 DT_SIZE_K(256)>;
};
};
i2c2: i2c@41001000 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x41001000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK(APB1, 23)>;
interrupts = <4 0>;
interrupt-names = "combined";
status = "disabled";
};
spi1: spi@41002000 {
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x41002000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK(APB1, 0)>;
interrupts = <5 0>;
status = "disabled";
};
spi2: spi@41003000 {
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x41003000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK(APB1, 12)>;
interrupts = <6 0>;
status = "disabled";
};
timers1: timers@40002000 {
compatible = "st,stm32-timers";
reg = <0x40002000 DT_SIZE_K(1)>;
clocks = <&rcc STM32_CLOCK(APB0, 0)>;
resets = <&rctl STM32_RESET(APB0, 0)>;
interrupts = <10 0>;
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
#pwm-cells = <3>;
};
counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};
};
};