tests: drivers: clock_control: stm32_wl fix external clock dts
The nucleo_wl55jc according to the datasheet does have a
NT2016SF-32M-END5875A 32MHz TCXO as HSE, therefore needs
enable the "hse-tcxo;" property to work, this was not the case
for the clock_configuration/stm32_common_devices test cases.
Additionally, remove the comment about about ST-Link clock,
because the source is the tcxo and not the ST-Link.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
diff --git a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/boards/wl_32_hse.overlay b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/boards/wl_32_hse.overlay
index a379a81..2139b1d 100644
--- a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/boards/wl_32_hse.overlay
+++ b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/boards/wl_32_hse.overlay
@@ -12,7 +12,7 @@
&clk_hse {
hse-tcxo;
- clock-frequency = <DT_FREQ_M(32)>; /* STLink 32MHz clock */
+ clock-frequency = <DT_FREQ_M(32)>;
status = "okay";
};
diff --git a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/boards/wl_pll_48_hse_32.overlay b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/boards/wl_pll_48_hse_32.overlay
index bef8db6..c482636 100644
--- a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/boards/wl_pll_48_hse_32.overlay
+++ b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/boards/wl_pll_48_hse_32.overlay
@@ -13,7 +13,7 @@
&clk_hse {
hse-tcxo;
hse-div2;
- clock-frequency = <DT_FREQ_M(32)>; /* STLink 32MHz clock */
+ clock-frequency = <DT_FREQ_M(32)>;
status = "okay";
};
diff --git a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/wl_i2c1_hsi_lptim1_lse.overlay b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/wl_i2c1_hsi_lptim1_lse.overlay
index 593408f..6234e76 100644
--- a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/wl_i2c1_hsi_lptim1_lse.overlay
+++ b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/wl_i2c1_hsi_lptim1_lse.overlay
@@ -47,6 +47,7 @@
*/
&clk_hse {
+ hse-tcxo;
status = "okay";
clock-frequency = <DT_FREQ_M(32)>;
};
diff --git a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/wl_i2c1_sysclk_lptim1_lsi.overlay b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/wl_i2c1_sysclk_lptim1_lsi.overlay
index 5868edf..ab869a8 100644
--- a/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/wl_i2c1_sysclk_lptim1_lsi.overlay
+++ b/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/wl_i2c1_sysclk_lptim1_lsi.overlay
@@ -47,6 +47,7 @@
*/
&clk_hse {
+ hse-tcxo;
status = "okay";
clock-frequency = <DT_FREQ_M(32)>;
};
