| # Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company) or |
| # an affiliate of Cypress Semiconductor Corporation |
| # Copyright (c) David Ullmann |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| # Infineon PSoC6_04 based MCU default configuration |
| |
| if SOC_DIE_PSOC6_04 |
| |
| config NUM_IRQS |
| default 16 if CPU_CORTEX_M0PLUS |
| default 175 if CPU_CORTEX_M4 |
| |
| config SOC |
| default "CY8C6244AZI_S4D92" if SOC_CY8C6244AZI_S4D92 |
| default "CY8C6244LQI_S4D92" if SOC_CY8C6244LQI_S4D92 |
| default "CY8C6244AZI_S4D93" if SOC_CY8C6244AZI_S4D93 |
| default "CY8C6244AZI_S4D82" if SOC_CY8C6244AZI_S4D82 |
| default "CY8C6244LQI_S4D82" if SOC_CY8C6244LQI_S4D82 |
| default "CY8C6244AZI_S4D83" if SOC_CY8C6244AZI_S4D83 |
| default "CY8C6244AZI_S4D62" if SOC_CY8C6244AZI_S4D62 |
| default "CY8C6244LQI_S4D62" if SOC_CY8C6244LQI_S4D62 |
| default "CY8C6244AZI_S4D12" if SOC_CY8C6244AZI_S4D12 |
| default "CY8C6244LQI_S4D12" if SOC_CY8C6244LQI_S4D12 |
| default "CY8C6144AZI_S4F92" if SOC_CY8C6144AZI_S4F92 |
| default "CY8C6144LQI_S4F92" if SOC_CY8C6144LQI_S4F92 |
| default "CY8C6144AZI_S4F93" if SOC_CY8C6144AZI_S4F93 |
| default "CY8C6144AZI_S4F82" if SOC_CY8C6144AZI_S4F82 |
| default "CY8C6144LQI_S4F82" if SOC_CY8C6144LQI_S4F82 |
| default "CY8C6144AZI_S4F83" if SOC_CY8C6144AZI_S4F83 |
| default "CY8C6144AZI_S4F62" if SOC_CY8C6144AZI_S4F62 |
| default "CY8C6144LQI_S4F62" if SOC_CY8C6144LQI_S4F62 |
| default "CY8C6144AZI_S4F12" if SOC_CY8C6144AZI_S4F12 |
| default "CY8C6144LQI_S4F12" if SOC_CY8C6144LQI_S4F12 |
| |
| |
| endif # SOC_DIE_PSOC6_04 |
