| /* |
| * Copyright (c) 2022 Nordic Semiconductor |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| &pinctrl { |
| uart0_default: uart0_default { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 0, 6)>, |
| <NRF_PSEL(UART_RX, 0, 8)>, |
| <NRF_PSEL(UART_RTS, 0, 5)>, |
| <NRF_PSEL(UART_CTS, 0, 7)>; |
| }; |
| }; |
| |
| uart0_sleep: uart0_sleep { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 0, 6)>, |
| <NRF_PSEL(UART_RX, 0, 8)>, |
| <NRF_PSEL(UART_RTS, 0, 5)>, |
| <NRF_PSEL(UART_CTS, 0, 7)>; |
| low-power-enable; |
| }; |
| }; |
| |
| i2c0_default: i2c0_default { |
| group1 { |
| psels = <NRF_PSEL(TWIM_SDA, 0, 12)>, |
| <NRF_PSEL(TWIM_SCL, 0, 11)>; |
| }; |
| }; |
| |
| i2c0_sleep: i2c0_sleep { |
| group1 { |
| psels = <NRF_PSEL(TWIM_SDA, 0, 12)>, |
| <NRF_PSEL(TWIM_SCL, 0, 11)>; |
| low-power-enable; |
| }; |
| }; |
| |
| i2c1_default: i2c1_default { |
| group1 { |
| psels = <NRF_PSEL(TWIM_SDA, 0, 2)>, |
| <NRF_PSEL(TWIM_SCL, 0, 3)>; |
| }; |
| }; |
| |
| i2c1_sleep: i2c1_sleep { |
| group1 { |
| psels = <NRF_PSEL(TWIM_SDA, 0, 2)>, |
| <NRF_PSEL(TWIM_SCL, 0, 3)>; |
| low-power-enable; |
| }; |
| }; |
| |
| spi0_default: spi0_default { |
| group1 { |
| psels = <NRF_PSEL(SPIM_SCK, 0, 19)>, |
| <NRF_PSEL(SPIM_MOSI, 0, 20)>, |
| <NRF_PSEL(SPIM_MISO, 0, 21)>; |
| }; |
| }; |
| |
| spi0_sleep: spi0_sleep { |
| group1 { |
| psels = <NRF_PSEL(SPIM_SCK, 0, 19)>, |
| <NRF_PSEL(SPIM_MOSI, 0, 20)>, |
| <NRF_PSEL(SPIM_MISO, 0, 21)>; |
| low-power-enable; |
| }; |
| }; |
| |
| spi1_default: spi1_default { |
| group1 { |
| psels = <NRF_PSEL(SPIM_SCK, 0, 25)>, |
| <NRF_PSEL(SPIM_MOSI, 1, 2)>, |
| <NRF_PSEL(SPIM_MISO, 0, 24)>; |
| }; |
| }; |
| |
| spi1_sleep: spi1_sleep { |
| group1 { |
| psels = <NRF_PSEL(SPIM_SCK, 0, 25)>, |
| <NRF_PSEL(SPIM_MOSI, 1, 2)>, |
| <NRF_PSEL(SPIM_MISO, 0, 24)>; |
| low-power-enable; |
| }; |
| }; |
| |
| spi2_default: spi2_default { |
| group1 { |
| psels = <NRF_PSEL(SPIM_SCK, 0, 26)>, |
| <NRF_PSEL(SPIM_MOSI, 0, 23)>, |
| <NRF_PSEL(SPIM_MISO, 0, 27)>; |
| }; |
| }; |
| |
| spi2_sleep: spi2_sleep { |
| group1 { |
| psels = <NRF_PSEL(SPIM_SCK, 0, 26)>, |
| <NRF_PSEL(SPIM_MOSI, 0, 23)>, |
| <NRF_PSEL(SPIM_MISO, 0, 27)>; |
| low-power-enable; |
| }; |
| }; |
| |
| spi3_default: spi3_default { |
| group1 { |
| psels = <NRF_PSEL(SPIM_SCK, 0, 29)>, |
| <NRF_PSEL(SPIM_MOSI, 0, 30)>, |
| <NRF_PSEL(SPIM_MISO, 0, 31)>; |
| }; |
| }; |
| |
| spi3_sleep: spi3_sleep { |
| group1 { |
| psels = <NRF_PSEL(SPIM_SCK, 0, 29)>, |
| <NRF_PSEL(SPIM_MOSI, 0, 30)>, |
| <NRF_PSEL(SPIM_MISO, 0, 31)>; |
| low-power-enable; |
| }; |
| }; |
| |
| }; |