| /* |
| * Copyright (c) 2019 Laird Connectivity |
| * Copyright (c) 2023 Nordic Semiconductor ASA |
| * Copyright (c) 2024 Ezurio |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| /dts-v1/; |
| #include <nordic/nrf52832_qfaa.dtsi> |
| #include "bl652_dvk-pinctrl.dtsi" |
| #include <zephyr/dt-bindings/input/input-event-codes.h> |
| |
| / { |
| model = "Ezurio BL652 DVK"; |
| compatible = "ezurio,bl652_dvk"; |
| |
| chosen { |
| zephyr,console = &uart0; |
| zephyr,shell-uart = &uart0; |
| zephyr,uart-mcumgr = &uart0; |
| zephyr,bt-mon-uart = &uart0; |
| zephyr,bt-c2h-uart = &uart0; |
| zephyr,sram = &sram0; |
| zephyr,flash = &flash0; |
| zephyr,code-partition = &slot0_partition; |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| led1: led_1 { |
| gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>; |
| label = "Blue LED 1"; |
| }; |
| led2: led_2 { |
| gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>; |
| label = "Blue LED 2"; |
| }; |
| }; |
| |
| buttons { |
| compatible = "gpio-keys"; |
| button1: button_1 { |
| gpios = <&gpio0 11 GPIO_PULL_UP>; |
| label = "Push button switch 1"; |
| zephyr,code = <INPUT_KEY_0>; |
| }; |
| button2: button_2 { |
| gpios = <&gpio0 15 GPIO_PULL_UP>; |
| label = "Push button switch 2"; |
| zephyr,code = <INPUT_KEY_1>; |
| }; |
| }; |
| |
| /* These aliases are provided for compatibility with samples */ |
| aliases { |
| led0 = &led1; |
| led1 = &led2; |
| sw0 = &button1; |
| sw1 = &button2; |
| mcuboot-button0 = &button1; |
| mcuboot-led0 = &led1; |
| watchdog0 = &wdt0; |
| bbram0 = &extrtc0; |
| }; |
| }; |
| |
| ® { |
| regulator-initial-mode = <NRF5X_REG_MODE_DCDC>; |
| }; |
| |
| &adc { |
| status = "okay"; |
| }; |
| |
| &uicr { |
| gpio-as-nreset; |
| }; |
| |
| &gpiote { |
| status = "okay"; |
| }; |
| |
| &gpio0 { |
| status = "okay"; |
| }; |
| |
| &uart0 { |
| status = "okay"; |
| compatible = "nordic,nrf-uart"; |
| current-speed = <115200>; |
| pinctrl-0 = <&uart0_default>; |
| pinctrl-1 = <&uart0_sleep>; |
| pinctrl-names = "default", "sleep"; |
| }; |
| |
| &i2c0 { |
| compatible = "nordic,nrf-twi"; |
| status = "okay"; |
| |
| pinctrl-0 = <&i2c0_default>; |
| pinctrl-1 = <&i2c0_sleep>; |
| pinctrl-names = "default", "sleep"; |
| dac0: mcp4725@60 { |
| /* MCP4725 not populated at factory */ |
| compatible = "microchip,mcp4725"; |
| reg = <0x60>; |
| #io-channel-cells = <1>; |
| status = "disabled"; |
| }; |
| |
| extrtc0: mcp7940n@6f { |
| compatible = "microchip,mcp7940n"; |
| reg = <0x6f>; |
| status = "okay"; |
| }; |
| }; |
| |
| &pwm0 { |
| status = "okay"; |
| pinctrl-0 = <&pwm0_default>; |
| pinctrl-1 = <&pwm0_sleep>; |
| pinctrl-names = "default", "sleep"; |
| }; |
| |
| &spi0 { |
| compatible = "nordic,nrf-spi"; |
| /* Cannot be used together with i2c0. */ |
| /* status = "okay"; */ |
| cs-gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; |
| pinctrl-0 = <&spi0_default>; |
| pinctrl-1 = <&spi0_sleep>; |
| pinctrl-names = "default", "sleep"; |
| }; |
| |
| &spi1 { |
| compatible = "nordic,nrf-spi"; |
| status = "okay"; |
| cs-gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; |
| pinctrl-0 = <&spi1_default>; |
| pinctrl-1 = <&spi1_sleep>; |
| pinctrl-names = "default", "sleep"; |
| }; |
| |
| &flash0 { |
| |
| partitions { |
| compatible = "fixed-partitions"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| boot_partition: partition@0 { |
| label = "mcuboot"; |
| reg = <0x00000000 0xc000>; |
| }; |
| slot0_partition: partition@c000 { |
| label = "image-0"; |
| reg = <0x0000C000 0x32000>; |
| }; |
| slot1_partition: partition@3e000 { |
| label = "image-1"; |
| reg = <0x0003E000 0x32000>; |
| }; |
| scratch_partition: partition@70000 { |
| label = "image-scratch"; |
| reg = <0x00070000 0xa000>; |
| }; |
| storage_partition: partition@7a000 { |
| label = "storage"; |
| reg = <0x0007a000 0x00006000>; |
| }; |
| }; |
| }; |