tests/drivers/clock_control/pwm_clock/boards/sam_v71_xult.overlay

/*
 * Copyright (c) 2023 Andriy Gelman
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/ {
	pwmclock: pwmclock {
		status = "okay";
		compatible = "pwm-clock";
		#clock-cells = <1>;
		clock-frequency = <1000000>;
		pwms = <&pwm0 0 PWM_KHZ(1000) PWM_POLARITY_NORMAL>;
	};

	samplenode: samplenode {
		status = "okay";
		compatible = "test-clock-control-pwm-clock";
		clocks = <&pwmclock 0>;
	};
};

&pwm0 {
	prescaler = <1>;
};