blob: dbd2f307d60aa6fbaf1a0dadfcce83137472b5b2 [file] [log] [blame]
/*
* Copyright (c) 2017 I-SENSE group of ICCS
*
* SoC device tree include for STM32F103xE SoCs
* where 'x' is replaced for specific SoCs like {R,V,Z}
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/stm32f103Xb.dtsi>
/ {
soc {
uart4: serial@40004c00 {
compatible = "st,stm32-uart";
reg = <0x40004c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
interrupts = <52 0>;
status = "disabled";
label = "UART_4";
};
spi3: spi@40003C00 {
compatible = "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003C00 0x400>;
interrupts = <51 5>;
status = "disabled";
};
pinctrl: pin-controller@40010800 {
reg = <0x40010800 0x2000>;
gpiof: gpio@40011c00 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40011c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000081>;
label = "GPIOF";
};
};
};
};