blob: 433bafa78fcbea8cdb40292e4906a8f8f2c3eb70 [file] [log] [blame]
/*
* Copyright (c) 2019 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <mem.h>
#define DT_SRAM_SIZE DT_SIZE_M(2048)
#include <apollo_lake.dtsi>
/ {
model = "gpmrb";
compatible = "intel,apollo_lake";
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart2;
zephyr,shell-uart = &uart2;
zephyr,bt-uart = &uart1;
zephyr,uart-pipe = &uart1;
zephyr,bt-mon-uart = &uart1;
};
};
&uart0 { interrupts = <4 IRQ_TYPE_LEVEL_LOW 3>; };
&uart1 { interrupts = <5 IRQ_TYPE_LEVEL_LOW 3>; };
&uart2 { interrupts = <6 IRQ_TYPE_LEVEL_LOW 3>; };
&uart3 { interrupts = <7 IRQ_TYPE_LEVEL_LOW 3>; };