soc/arc/snps_nsim/Kconfig.defconfig.hs_smp

# Copyright (c) 2019 Synopsys, Inc. All rights reserved.
# SPDX-License-Identifier: Apache-2.0

if SOC_NSIM_HS_SMP

config NUM_IRQ_PRIO_LEVELS
	# This processor supports 16 priority levels:
	# 0 for Fast Interrupts (FIRQs) and 1-15 for Regular Interrupts (IRQs).
	default 2

config NUM_IRQS
	# must be > the highest interrupt number used
	default 88

config RGF_NUM_BANKS
	default 2

config SYS_CLOCK_HW_CYCLES_PER_SEC
        # SMP simulation is slower than single core, 1 Mhz seems reasonable match with wallclock
	default 1000000

config HARVARD
	default y

config ARC_FIRQ
	default y

config CACHE_FLUSHING
	default y

config ARC_CONNECT
	default y

config MP_NUM_CPUS
	default 2

# When SMP is enabled, use gfrc as wall clock, so sloppy
# idle should be y
config SYSTEM_CLOCK_SLOPPY_IDLE
	default y
	depends on SMP

endif # SOC_NSIM_HS_SMP