blob: bedcc5fce2a942adffd2d827bb38ffdb3457ba14 [file] [log] [blame]
/*
* Copyright (c) 2019 Philippe Retornaz <philippe@shapescale.com>
* Copyright (c) 2019 ST Microelectronics
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/g0/stm32g070.dtsi>
/ {
soc {
usart3: serial@40004800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
interrupts = <29 0>;
interrupt-names = "combined";
status = "disabled";
label = "UART_3";
};
usart4: serial@40004c00 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
interrupts = <29 1>;
interrupt-names = "combined";
status = "disabled";
label = "UART_4";
};
dac1: dac@40007400 {
compatible = "st,stm32-dac";
reg = <0x40007400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x20000000>;
status = "disabled";
label = "DAC_1";
#io-channel-cells = <1>;
};
};
};