| /* |
| * Copyright (c) 2022 Nordic Semiconductor |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| &pinctrl { |
| uart0_default: uart0_default { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 0, 2)>, |
| <NRF_PSEL(UART_RX, 0, 5)>, |
| <NRF_PSEL(UART_CTS, 0, 14)>, |
| <NRF_PSEL(UART_RTS, 0, 18)>; |
| }; |
| }; |
| |
| uart0_sleep: uart0_sleep { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 0, 2)>, |
| <NRF_PSEL(UART_RX, 0, 5)>, |
| <NRF_PSEL(UART_CTS, 0, 14)>, |
| <NRF_PSEL(UART_RTS, 0, 18)>; |
| low-power-enable; |
| }; |
| }; |
| |
| i2c2_default: i2c2_default { |
| group1 { |
| psels = <NRF_PSEL(TWIM_SDA, 0, 10)>, |
| <NRF_PSEL(TWIM_SCL, 0, 11)>; |
| }; |
| }; |
| |
| i2c2_sleep: i2c2_sleep { |
| group1 { |
| psels = <NRF_PSEL(TWIM_SDA, 0, 10)>, |
| <NRF_PSEL(TWIM_SCL, 0, 11)>; |
| low-power-enable; |
| }; |
| }; |
| |
| spi3_default: spi3_default { |
| group1 { |
| psels = <NRF_PSEL(SPIM_SCK, 0, 6)>, |
| <NRF_PSEL(SPIM_MOSI, 0, 3)>, |
| <NRF_PSEL(SPIM_MISO, 0, 8)>; |
| }; |
| }; |
| |
| spi3_sleep: spi3_sleep { |
| group1 { |
| psels = <NRF_PSEL(SPIM_SCK, 0, 6)>, |
| <NRF_PSEL(SPIM_MOSI, 0, 3)>, |
| <NRF_PSEL(SPIM_MISO, 0, 8)>; |
| low-power-enable; |
| }; |
| }; |
| |
| pwm0_default: pwm0_default { |
| group1 { |
| psels = <NRF_PSEL(PWM_OUT0, 0, 21)>, |
| <NRF_PSEL(PWM_OUT1, 0, 22)>, |
| <NRF_PSEL(PWM_OUT2, 0, 25)>; |
| nordic,invert; |
| }; |
| }; |
| |
| pwm0_sleep: pwm0_sleep { |
| group1 { |
| psels = <NRF_PSEL(PWM_OUT0, 0, 21)>, |
| <NRF_PSEL(PWM_OUT1, 0, 22)>, |
| <NRF_PSEL(PWM_OUT2, 0, 25)>; |
| low-power-enable; |
| }; |
| }; |
| |
| }; |