| /* |
| * Copyright (c) 2017, NXP |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <arm/armv7-m.dtsi> |
| #include <dt-bindings/clock/imx_ccm.h> |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/i2c/i2c.h> |
| |
| / { |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu@0 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-m7"; |
| reg = <0>; |
| }; |
| }; |
| |
| soc { |
| flexram0: flexram@400b0000 { |
| compatible = "nxp,imx-flexram"; |
| reg = <0x400b0000 0x4000>; |
| interrupts = <38 0>; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| itcm0: itcm@0 { |
| compatible = "nxp,imx-itcm"; |
| reg = <0x00000000 0x20000>; |
| }; |
| |
| dtcm0: dtcm@20000000 { |
| compatible = "nxp,imx-dtcm"; |
| reg = <0x20000000 0x20000>; |
| }; |
| |
| ocram0: ocram@20200000 { |
| compatible = "mmio-sram"; |
| reg = <0x20200000 0x40000>; |
| }; |
| }; |
| |
| flexspi0: flexspi0@402a8000 { |
| compatible = "nxp,imx-flexspi"; |
| reg = <0x402a8000 0x4000>; |
| interrupts = <108 0>; |
| label = "FLEXSPI0"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| flexspi1: flexspi1@402a4000 { |
| compatible = "nxp,imx-flexspi"; |
| reg = <0x402a4000 0x4000>; |
| interrupts = <107 0>; |
| label = "FLEXSPI1"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| semc0: semc0@402f0000 { |
| compatible = "nxp,imx-semc"; |
| reg = <0x402f0000 0x4000>; |
| interrupts = <109 0>; |
| label = "SEMC0"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| }; |
| |
| ccm: ccm@400fc000 { |
| compatible = "nxp,imx-ccm"; |
| reg = <0x400fc000 0x4000>; |
| label = "CCM"; |
| |
| clock-controller; |
| #clock-cells = <3>; |
| }; |
| |
| gpio1: gpio@401b8000 { |
| compatible = "nxp,imx-gpio"; |
| reg = <0x401b8000 0x4000>; |
| interrupts = <80 0>, <81 0>; |
| label = "GPIO_1"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpio2: gpio@401bc000 { |
| compatible = "nxp,imx-gpio"; |
| reg = <0x401bc000 0x4000>; |
| interrupts = <82 0>, <83 0>; |
| label = "GPIO_2"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpio3: gpio@401c0000 { |
| compatible = "nxp,imx-gpio"; |
| reg = <0x401c0000 0x4000>; |
| interrupts = <84 0>, <85 0>; |
| label = "GPIO_3"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpio4: gpio@401c4000 { |
| compatible = "nxp,imx-gpio"; |
| reg = <0x401c4000 0x4000>; |
| interrupts = <86 0>, <87 0>; |
| label = "GPIO_4"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpio5: gpio@400c0000 { |
| compatible = "nxp,imx-gpio"; |
| reg = <0x400c0000 0x4000>; |
| interrupts = <88 0>, <89 0>; |
| label = "GPIO_5"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| i2c1: i2c@403f0000 { |
| compatible = "nxp,imx-lpi2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x403f0000 0x4000>; |
| interrupts = <28 0>; |
| clocks = <&ccm IMX_CCM_LPI2C_CLK 0x70 6>; |
| label = "I2C_1"; |
| status = "disabled"; |
| }; |
| |
| i2c2: i2c@403f4000 { |
| compatible = "nxp,imx-lpi2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x403f4000 0x4000>; |
| interrupts = <29 0>; |
| clocks = <&ccm IMX_CCM_LPI2C_CLK 0x70 8>; |
| label = "I2C_2"; |
| status = "disabled"; |
| }; |
| |
| i2c3: i2c@403f8000 { |
| compatible = "nxp,imx-lpi2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x403f8000 0x4000>; |
| interrupts = <30 0>; |
| clocks = <&ccm IMX_CCM_LPI2C_CLK 0x70 10>; |
| label = "I2C_3"; |
| status = "disabled"; |
| }; |
| |
| i2c4: i2c@403fc000 { |
| compatible = "nxp,imx-lpi2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x403fc000 0x4000>; |
| interrupts = <31 0>; |
| clocks = <&ccm IMX_CCM_LPI2C_CLK 0x80 24>; |
| label = "I2C_4"; |
| status = "disabled"; |
| }; |
| |
| iomuxc: iomuxc@401f8000 { |
| reg = <0x401f8000 0x4000>; |
| label = "PINMUX_0"; |
| }; |
| |
| lcdif1: display-controller@402b8000 { |
| compatible = "fsl,imx6sx-lcdif"; |
| reg = <0x402b8000 0x4000>; |
| interrupts = <42 0>; |
| label = "ELCDIF_1"; |
| status = "disabled"; |
| }; |
| |
| spi1: spi@40394000 { |
| compatible = "nxp,imx-lpspi"; |
| reg = <0x40394000 0x4000>; |
| interrupts = <32 3>; |
| label = "SPI_1"; |
| status = "disabled"; |
| clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| spi2: spi@40398000 { |
| compatible = "nxp,imx-lpspi"; |
| reg = <0x40398000 0x4000>; |
| interrupts = <33 3>; |
| label = "SPI_2"; |
| status = "disabled"; |
| clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 2>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| spi3: spi@4039c000 { |
| compatible = "nxp,imx-lpspi"; |
| reg = <0x4039c000 0x4000>; |
| interrupts = <34 3>; |
| label = "SPI_3"; |
| status = "disabled"; |
| clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 4>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| spi4: spi@403a0000 { |
| compatible = "nxp,imx-lpspi"; |
| reg = <0x403a0000 0x4000>; |
| interrupts = <35 3>; |
| label = "SPI_4"; |
| status = "disabled"; |
| clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 6>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| uart1: uart@40184000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x40184000 0x4000>; |
| interrupts = <20 0>; |
| clocks = <&ccm IMX_CCM_LPUART_CLK 0x7c 24>; |
| label = "UART_1"; |
| status = "disabled"; |
| }; |
| |
| uart2: uart@40188000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x40188000 0x4000>; |
| interrupts = <21 0>; |
| clocks = <&ccm IMX_CCM_LPUART_CLK 0x68 28>; |
| label = "UART_2"; |
| status = "disabled"; |
| }; |
| |
| uart3: uart@4018c000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x4018c000 0x4000>; |
| interrupts = <22 0>; |
| clocks = <&ccm IMX_CCM_LPUART_CLK 0x68 12>; |
| label = "UART_3"; |
| status = "disabled"; |
| }; |
| |
| uart4: uart@40190000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x40190000 0x4000>; |
| interrupts = <23 0>; |
| clocks = <&ccm IMX_CCM_LPUART_CLK 0x6c 24>; |
| label = "UART_4"; |
| status = "disabled"; |
| }; |
| |
| uart5: uart@40194000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x40194000 0x4000>; |
| interrupts = <24 0>; |
| clocks = <&ccm IMX_CCM_LPUART_CLK 0x74 2>; |
| label = "UART_5"; |
| status = "disabled"; |
| }; |
| |
| uart6: uart@40198000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x40198000 0x4000>; |
| interrupts = <25 0>; |
| clocks = <&ccm IMX_CCM_LPUART_CLK 0x74 6>; |
| label = "UART_6"; |
| status = "disabled"; |
| }; |
| |
| uart7: uart@4019c000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x4019c000 0x4000>; |
| interrupts = <26 0>; |
| clocks = <&ccm IMX_CCM_LPUART_CLK 0x7c 26>; |
| label = "UART_7"; |
| status = "disabled"; |
| }; |
| |
| uart8: uart@401a0000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x401a0000 0x4000>; |
| interrupts = <27 0>; |
| clocks = <&ccm IMX_CCM_LPUART_CLK 0x80 14>; |
| label = "UART_8"; |
| status = "disabled"; |
| }; |
| |
| eth: ethernet@402d8000 { |
| compatible = "nxp,kinetis-ethernet"; |
| reg = <0x402D8000 0x628>; |
| interrupts = <114 0>; |
| interrupt-names = "COMMON"; |
| status = "disabled"; |
| local-mac-address = [00 00 00 00 00 00]; |
| label = "ETH_0"; |
| ptp { |
| compatible = "nxp,kinetis-ptp"; |
| status = "disabled"; |
| interrupts = <115 0>; |
| interrupt-names = "IEEE1588_TMR"; |
| }; |
| }; |
| |
| trng: random@400cc000 { |
| compatible = "nxp,kinetis-trng"; |
| reg = <0x400cc000 0x4000>; |
| status = "ok"; |
| interrupts = <53 0>; |
| label = "TRNG"; |
| }; |
| }; |
| }; |
| |
| &nvic { |
| arm,num-irq-priority-bits = <4>; |
| }; |
