blob: f439ab68b64a77a8570d1aa15af5b82c3234e2ae [file] [log] [blame]
# Xtensa board configuration
# Copyright (c) 2017 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
if SOC_INTEL_APL_ADSP
config SOC
string
default "intel_apl_adsp"
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 400000000 if XTENSA_TIMER
default 19200000 if CAVS_TIMER
config IRQ_OFFLOAD_INTNUM
default 0
# S1000 does not have MISC0.
# Since EXCSAVE2 is unused by Zephyr, use it instead.
config XTENSA_KERNEL_CPU_PTR_SR
default "EXCSAVE2"
config KERNEL_ENTRY
default "_MainEntry"
config MULTI_LEVEL_INTERRUPTS
default y
config 2ND_LEVEL_INTERRUPTS
default y
config DYNAMIC_INTERRUPTS
default y
config LOG
default y
# To prevent test uses TEST_LOGGING_MINIMAL
config TEST_LOGGING_DEFAULTS
default n
depends on TEST
if LOG
# When console is enabled printk should go through it
config LOG_PRINTK
default y if !CONSOLE
config LOG_BACKEND_RB
default y
config LOG_BACKEND_RB_MEM_BASE
default 0xBE008000
config LOG_BACKEND_RB_MEM_SIZE
default 8192
endif # LOG
if SMP
config MP_NUM_CPUS
default 2
config XTENSA_TIMER
default n
config CAVS_TIMER
default y
config IPM
default y
config IPM_CAVS_IDC
default y if IPM
config SCHED_IPI_SUPPORTED
default y if IPM_CAVS_IDC
endif
config IPM_INTEL_ADSP
default y
depends on IPM
config IPM_CONSOLE
default y
depends on CONSOLE
depends on IPM
endif