blob: 388f5da90e38440c9f8ce6ed48d37a9049f8001e [file] [log] [blame]
# Copyright (c) 2018, I-SENSE group of ICCS
# SPDX-License-Identifier: Apache-2.0
description: STM32 SPI controller with embedded Rx and Tx FIFOs
compatible: "st,stm32-spi-fifo"
include: spi-controller.yaml
properties:
reg:
required: true
interrupts:
required: true
pinctrl-0:
type: phandles
required: false
description: |
Pin configuration for SPI signals (MISO, MOSI, SCK and optional NSS).
We expect that the phandles will reference pinctrl nodes.
For example the SPI3 would be
<&spi3_sck_pc10 &spi3_miso_pc11 &spi3_mosi_pc12>;
Example with NSS Pin
<&spi3_sck_pc10 &spi3_miso_pc11 &spi3_mosi_pc12 &spi3_nss_pa15>;