blob: a1aad4e6817a7bd911391e5e62afbb92b825e216 [file] [log] [blame]
/*
* Copyright (c) 2018, 2019, Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include "skeleton.dtsi"
#include <mem.h>
#ifndef ICCM_ADDR
#define ICCM_ADDR 0
#endif
#ifndef ICCM_SIZE
#define ICCM_SIZE DT_SIZE_K(1024)
#endif
#ifndef DCCM_ADDR
#define DCCM_ADDR 80000000
#endif
#ifndef DCCM_SIZE
#define DCCM_SIZE DT_SIZE_K(1024)
#endif
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
intc: arcv2-intc {
compatible = "snps,arcv2-intc";
interrupt-controller;
#interrupt-cells = <2>;
};
};
iccm0: iccm@ICCM_ADDR {
compatible = "arc,iccm";
reg = <DT_ADDR(ICCM_ADDR) ICCM_SIZE>;
};
dccm0: dccm@DCCM_ADDR {
compatible = "arc,dccm";
reg = <DT_ADDR(DCCM_ADDR) DCCM_SIZE>;
};
uart0: uart@f0000000 {
compatible = "ns16550";
clock-frequency = <50000000>;
reg = <0xf0000000 0x400>;
current-speed = <115200>;
label = "UART_0";
interrupt-parent = <&intc>;
interrupts = <24 1>;
};
chosen {
zephyr,sram = &dccm0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
};
};