| /* |
| * Copyright (c) 2021 Telink Semiconductor |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| /dts-v1/; |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/i2c/i2c.h> |
| #include <dt-bindings/pinctrl/b91-pinctrl.h> |
| |
| / { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| cpu0: cpu@0 { |
| reg = <0>; |
| clock-frequency = <24000000>; |
| compatible ="telink,b91", "riscv"; |
| }; |
| }; |
| |
| soc { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "telink,telink_b91-soc"; |
| ranges; |
| |
| ram_ilm: memory@0 { |
| compatible = "mmio-sram"; |
| }; |
| |
| ram_dlm: memory@80000 { |
| compatible = "mmio-sram"; |
| }; |
| |
| flash_mspi: flash-controller@80140100 { |
| compatible = "telink,b91-flash-controller"; |
| label = "FLASH_MSPI"; |
| reg = <0x80140100 0x40>; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| flash: flash@20000000 { |
| compatible = "soc-nv-flash"; |
| write-block-size = <1>; |
| }; |
| }; |
| |
| power: power@80140180 { |
| compatible = "telink,b91-power"; |
| reg = <0x80140180 0x40>; |
| power-mode = "LDO_1P4_LDO_1P8"; |
| vbat-type = "VBAT_MAX_VALUE_GREATER_THAN_3V6"; |
| status = "okay"; |
| }; |
| |
| gpioa: gpio@80140300 { |
| compatible = "telink,b91-gpio"; |
| gpio-controller; |
| interrupt-parent = <&plic0>; |
| interrupts = <25 1>, <26 1>, <27 1>; |
| reg = <0x80140300 0x08>; |
| label = "GPIO_A"; |
| status = "disabled"; |
| #gpio-cells = <2>; |
| }; |
| |
| gpiob: gpio@80140308 { |
| compatible = "telink,b91-gpio"; |
| gpio-controller; |
| interrupt-parent = <&plic0>; |
| interrupts = <25 1>, <26 1>, <27 1>; |
| reg = <0x80140308 0x08>; |
| label = "GPIO_B"; |
| status = "disabled"; |
| #gpio-cells = <2>; |
| }; |
| |
| gpioc: gpio@80140310 { |
| compatible = "telink,b91-gpio"; |
| gpio-controller; |
| interrupt-parent = <&plic0>; |
| interrupts = <25 1>, <26 1>, <27 1>; |
| reg = <0x80140310 0x08>; |
| label = "GPIO_C"; |
| status = "disabled"; |
| #gpio-cells = <2>; |
| }; |
| |
| gpiod: gpio@80140318 { |
| compatible = "telink,b91-gpio"; |
| gpio-controller; |
| interrupt-parent = <&plic0>; |
| interrupts = <25 1>, <26 1>, <27 1>; |
| reg = <0x80140318 0x08>; |
| label = "GPIO_D"; |
| status = "disabled"; |
| #gpio-cells = <2>; |
| }; |
| |
| gpioe: gpio@80140320 { |
| compatible = "telink,b91-gpio"; |
| gpio-controller; |
| interrupt-parent = <&plic0>; |
| interrupts = <25 1>, <26 1>, <27 1>; |
| reg = <0x80140320 0x08>; |
| label = "GPIO_E"; |
| status = "disabled"; |
| #gpio-cells = <2>; |
| }; |
| |
| plic0: interrupt-controller@e4000000 { |
| compatible = "sifive,plic-1.0.0"; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| reg = < 0xe4000000 0x00001000 |
| 0xe4002000 0x00000800 |
| 0xe4200000 0x00010000 >; |
| reg-names = "prio", "irq_en", "reg"; |
| riscv,max-priority = <3>; |
| riscv,ndev = <63>; |
| }; |
| |
| uart0: serial@80140080 { |
| compatible = "telink,b91-uart"; |
| label = "UART_0"; |
| reg = <0x80140080 0x40>; |
| interrupts = <19 1>; |
| interrupt-parent = <&plic0>; |
| status = "disabled"; |
| }; |
| |
| uart1: serial@801400C0 { |
| compatible = "telink,b91-uart"; |
| label = "UART_1"; |
| reg = <0x801400C0 0x40>; |
| interrupts = <18 1>; |
| interrupt-parent = <&plic0>; |
| status = "disabled"; |
| }; |
| |
| ieee802154: ieee802154@80140800 { |
| compatible = "telink,b91-zb"; |
| reg = <0x80140800 0x800>; |
| label = "IEEE802154"; |
| interrupt-parent = <&plic0>; |
| interrupts = <15 2>; |
| status = "disabled"; |
| }; |
| |
| trng0: trng@80101800 { |
| compatible = "telink,b91-trng"; |
| reg = <0x80101800 0x20>; |
| label = "TRNG"; |
| status = "disabled"; |
| }; |
| |
| pwm0: pwm@80140400 { |
| compatible = "telink,b91-pwm"; |
| reg = <0x80140400 0x80>; |
| channels = <6>; |
| label = "PWM"; |
| status = "disabled"; |
| #pwm-cells = <2>; |
| }; |
| |
| hspi: spi@81FFFFC0 { |
| compatible = "telink,b91-spi"; |
| label = "HSPI"; |
| reg = <0x81FFFFC0 0x40>; |
| peripheral-id = "HSPI_MODULE"; |
| cs0-pin = "0"; |
| cs1-pin = "0"; |
| cs2-pin = "0"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| pspi: spi@80140040 { |
| compatible = "telink,b91-spi"; |
| label = "PSPI"; |
| reg = <0x80140040 0x40>; |
| peripheral-id = "PSPI_MODULE"; |
| cs0-pin = "0"; |
| cs1-pin = "0"; |
| cs2-pin = "0"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| i2c: i2c@80140280 { |
| compatible = "telink,b91-i2c"; |
| label = "I2C"; |
| reg = <0x80140280 0x40>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| }; |
| |
| pinmux: pinmux@80140330 { |
| compatible = "telink,b91-pinmux"; |
| reg = <0x80140330 0x28 |
| 0x80140306 0x28 |
| 0x0000000e 0x0C>; |
| reg-names = "pin_mux", |
| "gpio_en", |
| "pull_up_en"; |
| label = "PINMUX"; |
| status = "disabled"; |
| |
| /* UART0: TX(PA3 PB2 PD2), RX(PA4 PB3 PD3) */ |
| |
| uart0_tx_pa3: uart0_tx_pa3 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_A, B91_PIN_3)>; |
| }; |
| uart0_tx_pb2: uart0_tx_pb2 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_B, B91_PIN_2)>; |
| }; |
| uart0_tx_pd2: uart0_tx_pd2 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_2)>; |
| }; |
| |
| uart0_rx_pa4: uart0_rx_pa4 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_A, B91_PIN_4)>; |
| }; |
| uart0_rx_pb3: uart0_rx_pb3 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_B, B91_PIN_3)>; |
| }; |
| uart0_rx_pd3: uart0_rx_pd3 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_3)>; |
| }; |
| |
| /* UART1: TX(PC6 PD6 PE0), RX(PC7 PD7 PE2) */ |
| |
| uart1_tx_pc6: uart1_tx_pc6 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_C, B91_PIN_6)>; |
| }; |
| uart1_tx_pd6: uart1_tx_pd6 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_6)>; |
| }; |
| uart1_tx_pe0: uart1_tx_pe0 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_E, B91_PIN_0)>; |
| }; |
| |
| uart1_rx_pc7: uart1_rx_pc7 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_C, B91_PIN_7)>; |
| }; |
| uart1_rx_pd7: uart1_rx_pd7 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_7)>; |
| }; |
| uart1_rx_pe2: uart1_rx_pe2 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_E, B91_PIN_2)>; |
| }; |
| |
| /* PWM Channel 0 (PB4, PC0, PE3) */ |
| |
| pwm_ch0_pb4: pwm_ch0_pb4 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_B, B91_PIN_4)>; |
| }; |
| pwm_ch0_pc0: pwm_ch0_pc0 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_C, B91_PIN_0)>; |
| }; |
| pwm_ch0_pe3: pwm_ch0_pe3 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_E, B91_PIN_3)>; |
| }; |
| |
| /* PWM Channel 1 (PB5, PE1) */ |
| |
| pwm_ch1_pb5: pwm_ch1_pb5 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_B, B91_PIN_5)>; |
| }; |
| pwm_ch1_pe1: pwm_ch1_pe1 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_E, B91_PIN_1)>; |
| }; |
| |
| /* PWM Channel 2 (PB7, PE2) */ |
| |
| pwm_ch2_pb7: pwm_ch2_pb7 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_B, B91_PIN_7)>; |
| }; |
| pwm_ch2_pe2: pwm_ch2_pe2 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_E, B91_PIN_2)>; |
| }; |
| |
| /* PWM Channel 3 (PB1, PE0) */ |
| |
| pwm_ch3_pb1: pwm_ch3_pb1 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_B, B91_PIN_1)>; |
| }; |
| pwm_ch3_pe0: pwm_ch3_pe0 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_E, B91_PIN_0)>; |
| }; |
| |
| /* PWM Channel 4 (PD7, PE4) */ |
| |
| pwm_ch4_pd7: pwm_ch4_pd7 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_D, B91_PIN_7)>; |
| }; |
| pwm_ch4_pe4: pwm_ch4_pe4 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_E, B91_PIN_4)>; |
| }; |
| |
| /* PWM Channel 5 (PB0, PE5) */ |
| |
| pwm_ch5_pb0: pwm_ch5_pb0 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_B, B91_PIN_0)>; |
| }; |
| pwm_ch5_pe5: pwm_ch5_pe5 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_E, B91_PIN_5)>; |
| }; |
| |
| /* PSPI: CLK(PC5, PB5, PD1), MOSI(PC7, PB7, PD3), MISO(PC6, PB6, PD2) */ |
| |
| pspi_clk_pc5: pspi_clk_pc5 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_C, B91_PIN_5)>; |
| }; |
| pspi_mosi_io0_pc7: pspi_mosi_io0_pc7 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_C, B91_PIN_7)>; |
| }; |
| pspi_miso_io1_pc6: pspi_miso_io1_pc6 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_C, B91_PIN_6)>; |
| }; |
| |
| pspi_clk_pb5: pspi_clk_pb5 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_B, B91_PIN_5)>; |
| }; |
| pspi_mosi_io0_pb7: pspi_mosi_io0_pb7 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_B, B91_PIN_7)>; |
| }; |
| pspi_miso_io1_pb6: pspi_miso_io1_pb6 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_B, B91_PIN_6)>; |
| }; |
| |
| pspi_clk_pd1: pspi_clk_pd1 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_1)>; |
| }; |
| pspi_mosi_io0_pd3: pspi_mosi_io0_pd3 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_3)>; |
| }; |
| pspi_miso_io1_pd2: pspi_miso_io1_pd2 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_D, B91_PIN_2)>; |
| }; |
| |
| /* HSPI: CLK(PA2, PB4), MOSI(PA4, PB3), MISO(PA3, PB2) */ |
| |
| hspi_clk_pa2: hspi_clk_pa2 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_A, B91_PIN_2)>; |
| }; |
| hspi_mosi_io0_pa4: hspi_mosi_io0_pa4 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_A, B91_PIN_4)>; |
| }; |
| hspi_miso_io1_pa3: hspi_miso_io1_pa3 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_C, B91_PORT_A, B91_PIN_3)>; |
| }; |
| |
| hspi_clk_pb4: hspi_clk_pb4 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_B, B91_PIN_4)>; |
| }; |
| hspi_mosi_io0_pb3: hspi_mosi_io0_pb3 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_B, B91_PIN_3)>; |
| }; |
| hspi_miso_io1_pb2: hspi_miso_io1_pb2 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_B, B91_PIN_2)>; |
| }; |
| |
| hspi_io2_pb1: hspi_io2_pb1 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_B, B91_PIN_1)>; |
| }; |
| hspi_io3_pb0: hspi_io3_pb0 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_B, B91_PIN_0)>; |
| }; |
| |
| /* Define I2C pins: SCL(PB2, PC1, PE0, PE1), SDA(PB3, PC2, PE2, PE3) */ |
| |
| i2c_scl_pb2: i2c_scl_pb2 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_B, B91_PIN_2)>; |
| }; |
| i2c_scl_pc1: i2c_scl_pc1 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_C, B91_PIN_1)>; |
| }; |
| i2c_scl_pe0: i2c_scl_pe0 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_E, B91_PIN_0)>; |
| }; |
| i2c_scl_pe1: i2c_scl_pe1 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_E, B91_PIN_1)>; |
| }; |
| |
| i2c_sda_pb3: i2c_sda_pb3 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_B, B91_PORT_B, B91_PIN_3)>; |
| }; |
| i2c_sda_pc2: i2c_sda_pc2 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_C, B91_PIN_2)>; |
| }; |
| i2c_sda_pe2: i2c_sda_pe2 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_E, B91_PIN_2)>; |
| }; |
| i2c_sda_pe3: i2c_sda_pe3 { |
| pinmux = <B91_PINMUX_SET(B91_FUNC_A, B91_PORT_E, B91_PIN_3)>; |
| }; |
| }; |
| }; |
| }; |
